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[209.132.180.67]) by mx.google.com with ESMTP id r12si18164965pgv.293.2019.03.27.09.37.40; Wed, 27 Mar 2019 09:37:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Xf8o0ZIG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727995AbfC0Qgo (ORCPT + 99 others); Wed, 27 Mar 2019 12:36:44 -0400 Received: from mail-ed1-f68.google.com ([209.85.208.68]:33472 "EHLO mail-ed1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726695AbfC0Qgo (ORCPT ); Wed, 27 Mar 2019 12:36:44 -0400 Received: by mail-ed1-f68.google.com with SMTP id q3so14619709edg.0; Wed, 27 Mar 2019 09:36:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+bwWy+eLTxSWd9ovZ/MLUn/2Sj3ZODuAfOnICK0GT7Q=; b=Xf8o0ZIGxSLwPicow7oAXPnxDzOGysm0NSMhUlR5dMVWvDKvuX37cqV2eauBFE+RzC JZbV51tVww37PIxO6InU+jNOF/YNS0rRLbhEhncRE62oVAqI4dWTGgcY1eUB2EJp1gdQ Rdy5VxCQaBAzIJQZL1IGa0tlq76eNhnFumL405bqDXgPvHIRckB70El5AODAlFgCz9KI Ht4/qOp5MQ+/QlZhGHtRKUsWHByp3FUAs2P/Lo5I5Vm4d2lXrysSapom894UhsGojAA3 /luQMxgHEqbdcS0IIaX2x2PiXOXC5zsYNUr0jXRMlRyFIaz4ulaWbGIE5gl3gugyPmhv j+2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+bwWy+eLTxSWd9ovZ/MLUn/2Sj3ZODuAfOnICK0GT7Q=; b=R2JVw28KgkP8tHGrGvFWrVAs1wE93DuVnnUgMa+KrR5/ymNQdkYMEanqY6YIgz24lv UgpoEhekrL1P1bsGsTanoE6h2wR52o+qaIeaospnZEyMteAEgsv3FudSqLpoJMO8ZbcN M0gVP6g5nz4AIFbLrwAHpXd3A9oDfItIT6s4iCPIBqtuk/vhFs8JYAMBxKO2gtIbF4fA imp/hz3QL9rTpQpU+DQeyik7V23OTTmEV9QGOheCq9txbGi2WtWB4RB2indWczrcZ1Wz OaE5wgHGJm8zgyDrv3osGaRrBmJhrvjxTDom56xzIehiagRWfAGMgMLk3BQzVQTQCjKz vNbw== X-Gm-Message-State: APjAAAU96cxNQn255lqVSmSTpbtDBIyTaumqx6V1KntFBM/kKEf8JHSi 6mRiG+uTfh+z7ikLl2bt9ltkTjO9u5JCxEOp2IU= X-Received: by 2002:a50:aa2e:: with SMTP id o43mr24520529edc.67.1553704602544; Wed, 27 Mar 2019 09:36:42 -0700 (PDT) MIME-Version: 1.0 References: <20190326094239.5910-1-daniel.baluta@nxp.com> <20190326094239.5910-3-daniel.baluta@nxp.com> <1553679236.2561.27.camel@pengutronix.de> In-Reply-To: <1553679236.2561.27.camel@pengutronix.de> From: Daniel Baluta Date: Wed, 27 Mar 2019 18:36:30 +0200 Message-ID: Subject: Re: [PATCH 2/2] arm64: dts: imx8qxp: Add EDMA0/EDMA1 nodes To: Lucas Stach Cc: Aisheng Dong , "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , Peng Fan , "festevam@gmail.com" , Anson Huang , Teo Hall , Daniel Baluta , "s.hauer@pengutronix.de" , "linux-kernel@vger.kernel.org" , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , "shawnguo@kernel.org" , "S.j. Wang" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 27, 2019 at 11:33 AM Lucas Stach wrote: > > Hi Daniel, > > Am Mittwoch, den 27.03.2019, 10:51 +0200 schrieb Daniel Baluta: > [...] > > > > > or > > > "fsl,imx8qxp-edma", "fsl,imx8qm-edma"? > > > > One thing that it is not clear for me is why there are places > > where we use two compatible strings? > > > > I understand the situation where are two distinct drivers, but is there > > any other reason to add multiple compatible strings for a node in dts? > > We use 2 compatible string where there should not be any differences > between the IP blocks of this SoC and a version the driver already > supports. > > So if the eDMA driver already supports the software interface for > "fsl,imx8qm-edma" and the IP block is compatible with this, we add this > to the DT, so the we don't need any driver changes just to support a > new SoC. But as you can never be sure if there are subtle differences > in the IP block and/or SOC integration when adding the DT support, we > also add a more specific compatible to the DT. If it turns out that > there are software visible differences, we only need to adapt the > driver to check for the more specific compatible to trigger the changed > behavior, allowing to keep the DT stable. Excellent explanation Lucas! For the moment upstream eDMA driver doesn't have support for any i.MX8 so I think using "fsl,imx8qxp-edma" should be acceptable. Thanks, Daniel.