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[209.132.180.67]) by mx.google.com with ESMTP id e6si17020442pfe.141.2019.03.27.11.39.09; Wed, 27 Mar 2019 11:39:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391846AbfC0Sho (ORCPT + 99 others); Wed, 27 Mar 2019 14:37:44 -0400 Received: from muru.com ([72.249.23.125]:43004 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391388AbfC0Shn (ORCPT ); Wed, 27 Mar 2019 14:37:43 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id BA5F680BB; Wed, 27 Mar 2019 18:37:55 +0000 (UTC) Date: Wed, 27 Mar 2019 11:37:38 -0700 From: Tony Lindgren To: Suman Anna Cc: linux-omap@vger.kernel.org, Dave Gerlach , Faiz Abbas , Greg Kroah-Hartman , Keerthy , Nishanth Menon , Peter Ujfalusi , Roger Quadros , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 09/14] bus: ti-sysc: Move rstctrl reset to happen later Message-ID: <20190327183738.GE49658@atomide.com> References: <20190325215849.13182-1-tony@atomide.com> <20190325215849.13182-10-tony@atomide.com> <20190326231306.GC49658@atomide.com> <20190326234022.GD49658@atomide.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.11.4 (2019-03-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Suman Anna [190327 16:27]: > On 3/26/19 6:40 PM, Tony Lindgren wrote: > > That's for rstctrl. I just did a quick test with my earlier > > reset-simple patch and I noticed sgx on am33xx produces a > > clock error unless we deassert it's rstrctrl before enabling > > clocks first: > > > > gfx-l3-clkctrl:0004:0: failed to enable > > Yeah, and I see a similar one across the other modules controlled by > RSTCTRL bits for me as well - MMUs, PRUSS etc. This is because you can > only check the module ready status in _omap4_clkctrl_clk_enable() only > both after the clocks are turned on and resets are deasserted. That > check will always fail with rstctrl asserted. The omap_hwmod code does > use the reset status checks for bailing out, but that stuff is not > present in clkctrl code and can only be achieved by adding a > CLKF_NO_IDLEST (somewhat misnamed) to the corresponding clkctrl atm. Sounds like on ti-sysc init we should just deassert the rstctrl if asserted, then enable clocks, and then read the revision. Then if we actually need to toggle rstctrl reset, that can be added with later patches. But with reset driver, the device IP handling device driver(s) should probably manage the rstctrl bits directly. > See [1] for AM33xx SGX. I will be posting some of these once I check the > behavior. Yeah OK sounds like we can avoid those issues by deasserting the module related rstctrl bit before enabling the clocks. Then deal with resets later if needed. > > Note that you probably also want to leave out the struct > > omap_hwmod data from omap_hwmod_*_data.c files with rstctrl > > entries. > > You mean no hwmod entries at all, or hwmod entries with no rstctrl data? Except for the lack of rstctrl reset driver, struct hwmod_data entries should only be needed for the few cases where we're not yet handling some oh->flags quirks. I think most of the remaining unhandled quirks are for omap2 and 3. Regards, Tony > [1] > http://git.ti.com/gitweb/?p=ti-linux-kernel/ti-linux-kernel.git;a=commitdiff;h=536d660714e98bdb7f96e5990a095283e52e4d8a > >