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From:   Patrick Venture <venture@google.com>
Date:   Wed, 27 Mar 2019 11:44:36 -0700
Message-ID: <CAO=notxFvvOmpjMyXvt5PyuWsB92eraN+=8mWk8_aY2w3sK-eQ@mail.gmail.com>
Subject: Re: [PATCH v7 2/2] drivers/misc: Add Aspeed P2A control driver
To:     Greg KH <gregkh@linuxfoundation.org>
Cc:     Arnd Bergmann <arnd@arndb.de>, Joel Stanley <joel@jms.id.au>,
        Andrew Jeffery <andrew@aj.id.au>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@lists.infradead.org>,
        linux-aspeed@lists.ozlabs.org
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On Wed, Mar 27, 2019 at 11:28 AM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Tue, Mar 12, 2019 at 09:31:01AM -0700, Patrick Venture wrote:
> > +     phys_addr_t mem_base;
>
> Is this really a 32bit value?

It's going to be a 32-bit value if this is in the dts for one of the
correspondingly supported aspeed models.

>
> Your ioctl thinks it is:
>
> > +struct aspeed_p2a_ctrl_mapping {
> > +     __u32 addr;
>
> Does this driver not work on a 64bit kernel?

This driver is aimed at only 32-bit hardware (ast2400/2500).  I
modeled the approach after the aspeed-lpc-ctrl driver as it's
providing similar functionality.

>
> > +     __u32 length;
> > +     __u32 flags;
> > +};
>
> addr really should be __u32 here so you don't have to mess with 32/64
> bit user/kernel issues, right?

Add is __u32 there.  Are you suggesting it shouldn't be?
>
> thanks,
>
> greg k-h