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From:   Logan Gunthorpe <logang@deltatee.com>
To:     linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc:     Stephen Bates <sbates@raithlin.com>,
        Palmer Dabbelt <palmer@sifive.com>,
        Christoph Hellwig <hch@lst.de>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Logan Gunthorpe <logang@deltatee.com>
Date:   Wed, 27 Mar 2019 15:36:36 -0600
Message-Id: <20190327213643.23789-1-logang@deltatee.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: [PATCH 0/7] RISC-V: Sparsmem, Memory Hotplug and pte_devmap for P2P
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Hi,

This patchset enables P2P on the RISC-V architecture. To do this on the
current kernel, we only need to be able to back IO memory with struct
pages using devm_memremap_pages(). This requires ARCH_HAS_ZONE_DEVICE,
ARCH_ENABLE_MEMORY_HOTPLUG, and ARCH_ENABLE_MEMORY_HOTREMOVE; which in
turn requires ARCH_SPARSEMEM_ENABLE. We also need to ensure that the
IO memory regions in hardware can be covered by the linear region
so that there is a linear relation ship between the virtual address and
the struct page address in the vmemmap region.

While our reason to do this work is for P2P, these features are all
useful, more generally, and also enable other kernel features.

The first patch in the series implements sparse mem. It was already
submitted and reviewed last cycle, only forgotten. It has been rebased
onto v5.1-rc2.

Patches 2 through 4 rework the architecture's virtual address space
mapping trying to get as much of the IO regions covered by the linear
mapping. With Sv39, we do not have enough address space to cover all the
typical hardware regions but we can get the majority of it.

Patch 5 and 6 implement memory hotplug and remove. These are relatively
straight forward additions similar to other arches.

Patch 7 implements pte_devmap which allows us to set
ARCH_HAS_ZONE_DEVICE.

The patchset was tested in QEMU and on a HiFive Unleashed board.
However, we were unable to actually test P2P transactions with this
exact set because we have been unable to get PCI working with v5.1-rc2.
We were able to get it running on a 4.19 era kernel (with a bunch of
out-of-tree patches for PCI on a Microsemi PolarFire board).

This series is based on v5.1-rc2 and a git tree is available here:

https://github.com/sbates130272/linux-p2pmem riscv-p2p-v1

Thanks,

Logan

--

Logan Gunthorpe (7):
  RISC-V: Implement sparsemem
  RISC-V: doc: Add file describing the virtual memory map
  RISC-V: Rework kernel's virtual address space mapping
  RISC-V: Update page tables to cover the whole linear mapping
  RISC-V: Implement memory hotplug
  RISC-V: Implement memory hot remove
  RISC-V: Implement pte_devmap()

 Documentation/riscv/mm.txt            |  24 +++
 arch/riscv/Kconfig                    |  32 +++-
 arch/riscv/include/asm/page.h         |   2 -
 arch/riscv/include/asm/pgtable-64.h   |   2 +
 arch/riscv/include/asm/pgtable-bits.h |   8 +-
 arch/riscv/include/asm/pgtable.h      |  45 ++++-
 arch/riscv/include/asm/sparsemem.h    |  11 ++
 arch/riscv/kernel/setup.c             |   1 -
 arch/riscv/mm/init.c                  | 251 ++++++++++++++++++++++++--
 9 files changed, 354 insertions(+), 22 deletions(-)
 create mode 100644 Documentation/riscv/mm.txt
 create mode 100644 arch/riscv/include/asm/sparsemem.h

--
2.20.1