Received: by 2002:a25:5b86:0:0:0:0:0 with SMTP id p128csp438421ybb; Thu, 28 Mar 2019 05:42:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqwUhi/XIkl+sG3u3gFcQ8Hb8vCOK7OtHHVtiy8OY4kTmYfvttIeCFG4wj85PQP/7i2+QKbo X-Received: by 2002:aa7:9219:: with SMTP id 25mr42025216pfo.205.1553776955927; Thu, 28 Mar 2019 05:42:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553776955; cv=none; d=google.com; s=arc-20160816; b=kWRbY9MqBpX8gIIb/0agyug7I2KxWstLGJkixu2vaPpIYO5loc3ScgPBMSY5DaAb2L zRvk2Igm0Nf8RPRBffxVgbx8X4PEf7ii2t73B9Ja5WGmwmYwjt9udeBLTq22K3LWdSx6 i0y/+6f9SLwAnd94zIuWA0ImUPWAUULktYYJqmZsCza7dNezJdCxj3vXkCp6qMXUSYs2 QYPplMYK8xF/oVFWkaEH255C1ZF50Cdv6yLAa0BiIXMxjbY969QmG8fXePWmMd3M1OB9 0/dvavKWI2qfX6COHeenuAydJ0PC03GFNrTuLg2m/08hP7Gd8+bTyz2Zmi7167fU9ifJ 5Mqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=EoRJMe9fRLYYCZ4AxdRUO4TRxf5asiShYrj73RhMA8Q=; b=OTqiiiL0b2YPqm16RrAxpwVxueFpqwLPjIQTowJCb6boxFkVGOz6KibedkGnQsvLPe Rhv1QWxnj2gU7NPl6tp/0ZhK8EllzDKrCTTzrs0+Ot/iahU0+pIECVZl5cADEoNcGUbg +Fo3MjQz3p44BGym3mJys0jPhhGwFDL2eLzUURstNS9VY4PFjsj+l8QHSGj3vHs7yMN/ 7Clbb8mTKVnKZQTrMKYDGlVjz4oh+9V8/b7RNCA6WD5DMuTRelmUqjMg63NK6mKw13VG sB7f8vcMaVfOKkQY+ktbB/0eSuz/IIXOFA6HBz46tTeHznNyEiSNTljibEOz0V2l3ZsI 1dcA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cf17si23405485plb.101.2019.03.28.05.42.20; Thu, 28 Mar 2019 05:42:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727962AbfC1Mkq (ORCPT + 99 others); Thu, 28 Mar 2019 08:40:46 -0400 Received: from mga04.intel.com ([192.55.52.120]:9515 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726969AbfC1Mgm (ORCPT ); Thu, 28 Mar 2019 08:36:42 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Mar 2019 05:36:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,280,1549958400"; d="scan'208";a="145991017" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 28 Mar 2019 05:36:38 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id 1C898709; Thu, 28 Mar 2019 14:36:34 +0200 (EET) From: Mika Westerberg To: linux-kernel@vger.kernel.org Cc: Michael Jamet , Yehezkel Bernat , Andreas Noever , Lukas Wunner , "David S . Miller" , Andy Shevchenko , Christian Kellner , Mario.Limonciello@dell.com, Mika Westerberg , netdev@vger.kernel.org Subject: [PATCH v3 07/36] thunderbolt: Enable TMU access when accessing port space on legacy devices Date: Thu, 28 Mar 2019 15:36:04 +0300 Message-Id: <20190328123633.42882-8-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190328123633.42882-1-mika.westerberg@linux.intel.com> References: <20190328123633.42882-1-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Light Ridge and Eagle Ridge both need to have TMU access enabled before port space can be fully accessed so make sure it happens on those. This allows us to get rid of the offset quirk in tb_port_find_cap(). Signed-off-by: Mika Westerberg --- drivers/thunderbolt/cap.c | 69 +++++++++++++++++++++++++++++---------- drivers/thunderbolt/tb.h | 10 ++++++ 2 files changed, 62 insertions(+), 17 deletions(-) diff --git a/drivers/thunderbolt/cap.c b/drivers/thunderbolt/cap.c index 9553305c63ea..a58585b4e6d9 100644 --- a/drivers/thunderbolt/cap.c +++ b/drivers/thunderbolt/cap.c @@ -13,6 +13,7 @@ #define CAP_OFFSET_MAX 0xff #define VSE_CAP_OFFSET_MAX 0xffff +#define TMU_ACCESS_EN BIT(20) struct tb_cap_any { union { @@ -22,28 +23,38 @@ struct tb_cap_any { }; } __packed; -/** - * tb_port_find_cap() - Find port capability - * @port: Port to find the capability for - * @cap: Capability to look - * - * Returns offset to start of capability or %-ENOENT if no such - * capability was found. Negative errno is returned if there was an - * error. - */ -int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap) +static int tb_port_enable_tmu(struct tb_port *port, bool enable) { - u32 offset; + struct tb_switch *sw = port->sw; + u32 value, offset; + int ret; /* - * DP out adapters claim to implement TMU capability but in - * reality they do not so we hard code the adapter specific - * capability offset here. + * Legacy devices need to have TMU access enabled before port + * space can be fully accessed. */ - if (port->config.type == TB_TYPE_DP_HDMI_OUT) - offset = 0x39; + if (tb_switch_is_lr(sw)) + offset = 0x26; + else if (tb_switch_is_er(sw)) + offset = 0x2a; + else + return 0; + + ret = tb_sw_read(sw, &value, TB_CFG_SWITCH, offset, 1); + if (ret) + return ret; + + if (enable) + value |= TMU_ACCESS_EN; else - offset = 0x1; + value &= ~TMU_ACCESS_EN; + + return tb_sw_write(sw, &value, TB_CFG_SWITCH, offset, 1); +} + +static int __tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap) +{ + u32 offset = 1; do { struct tb_cap_any header; @@ -62,6 +73,30 @@ int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap) return -ENOENT; } +/** + * tb_port_find_cap() - Find port capability + * @port: Port to find the capability for + * @cap: Capability to look + * + * Returns offset to start of capability or %-ENOENT if no such + * capability was found. Negative errno is returned if there was an + * error. + */ +int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap) +{ + int ret; + + ret = tb_port_enable_tmu(port, true); + if (ret) + return ret; + + ret = __tb_port_find_cap(port, cap); + + tb_port_enable_tmu(port, false); + + return ret; +} + static int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap) { int offset = sw->config.first_cap_offset; diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index 93c1ea21feeb..a166265dfcf9 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -436,6 +436,16 @@ static inline struct tb_switch *tb_to_switch(struct device *dev) return NULL; } +static inline bool tb_switch_is_lr(const struct tb_switch *sw) +{ + return sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE; +} + +static inline bool tb_switch_is_er(const struct tb_switch *sw) +{ + return sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE; +} + int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged); int tb_port_add_nfc_credits(struct tb_port *port, int credits); int tb_port_clear_counter(struct tb_port *port, int counter); -- 2.20.1