Received: by 2002:a25:5b86:0:0:0:0:0 with SMTP id p128csp1105588ybb; Thu, 28 Mar 2019 20:07:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqxBNUJC9WjNQ05WocD3mLuzTeVbugrdsAy5sHeOlGFlnKGR65G6mF/MuzmT17v/FSGiXKhE X-Received: by 2002:a65:510c:: with SMTP id f12mr44481051pgq.40.1553828820124; Thu, 28 Mar 2019 20:07:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553828820; cv=none; d=google.com; s=arc-20160816; b=M4C/Es0Xydip9tlPEFVd+E51KI67pDB1ssinufEzVFDnwW6EelavgMuKVw4aXmvYXS qxEEyrUdwZrWxVmpdIWso+XhMncbs1aHvxfT/9NiUJQg0BTDHDYBGUjBe+cRWDcrQfME X+d8BemzZP31VhVgYy6h6VCnIlsgEst8eh7+zfw7tf2r5Tp+3DUU8goBzJRS5SYPPZf3 Hk3f6st/MqV9ww8jAUyHSkkTLI0KwXsg6SBjbriWc9xhRZYIX8tZYGDmVn9gfaYjQfsX atDpxpkAZYQhfDBU/et8K3uMclBBfOm666JniVmqNeQauVqd+XZwrF8YACiz9bEB3+tk RdBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gbLsQajapHp8yt8fkh0lWuCUAozPg7cvkSOmtAlT5GA=; b=p9d8ir4j6U6uPMX2QduvOIiXDQZE9Vj/E/axgZgfBBJE4oMneIXkxINbenOvF1hweu z3Wtkdvj4DJ/ejgPbcBKF+Wc6uw9ibYfLLOVIZzJFPHJhXxomlmwT7oEx7EyIpjtiEGs rUvc5GJSwy9RwCDeaq1de6QhfWXS7QuUYmTFf5dypQNBxcdXeKpE+LSpddsHrV1Dvgp+ pLTgek3ogxoaUCviN/DNF2ihfaRf/vnHUlOqv9ieP8PEcFUYOnveyqX88+eP+f9ghZsF CxMBChw2QY1TxCtvlmEzveEEnDUVWEM7KBO7QDurZOUIvNUlKveBeqHO/Ea6xUmXPkzP RTIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=a8irCDeU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x20si828345plr.16.2019.03.28.20.06.44; Thu, 28 Mar 2019 20:07:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=a8irCDeU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728717AbfC2DEc (ORCPT + 99 others); Thu, 28 Mar 2019 23:04:32 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:46079 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728355AbfC2DEc (ORCPT ); Thu, 28 Mar 2019 23:04:32 -0400 Received: by mail-pf1-f193.google.com with SMTP id e24so319641pfi.12; Thu, 28 Mar 2019 20:04:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gbLsQajapHp8yt8fkh0lWuCUAozPg7cvkSOmtAlT5GA=; b=a8irCDeUZTYaWDlOPVhkUhdNdadXC5FKigwUBS5FyKvPTq2m8ypAM17/+I0gtzczuc SOG9Zd7KiJy6pnKr1Uk6eN3VDO551iSEW3nF4n0RRaSacK8OxWTyC0WPIXWJKlcscal9 lNHA/Tt7wX6Ae6oRUyBepvjiTEX0zzNQ1Lts5fTgOmFaOH4tL5TtZWy7iBVrWkLZ6RDh fMD2+UxDchjJAUXJsmWo1WgQgK5OEz6L4p8La/Rz2ds0y57qSt3k9Zs+XTP56ih7IQ6/ nrzuRapXW2cbb6e+AGWXyutszzyg0YfbdvbirVvyZ2ykmZw9CA9VkrAngTUGH8NvU1uA rCjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gbLsQajapHp8yt8fkh0lWuCUAozPg7cvkSOmtAlT5GA=; b=kR+FFgomPvcQVlT+MjwTl0Mkha3brQ4FTAgbm+Z9s6rSUz10JunZtvMtDYdWbtpG9Q 5lQKCLjjbc9+KZi7u7g9cAr6uWKQzvNgOpPaOReEap+SF61CF6B4FHa31x33U4IeIDRR wiN/1QYamDbyz0CH/twYwUMRsqNFSvUqXYoL7Q2tX2ZuP89/gbLK4au3a1pc3L/h1cru fMEPDi9fy4Umh/qVw1NVBvH/+iUzRMdJ8sCe+pJ6UvbyCChb31QrBkQsPdzd4W5hEQmY 1oGPmz+kj9R6J8HlNFiv9dn0T6bo1R9yWdpjtacGWDMq6w5WcwPYEgUmEKPJu+w1Vudb mCLQ== X-Gm-Message-State: APjAAAUYdqaBCeneuXK/DKx3W20t16o64lj7E6cx1ZdPrsmOTEdqOvQe tPTVB39YW1at4cE3aZLNYCQ= X-Received: by 2002:aa7:8552:: with SMTP id y18mr1267316pfn.176.1553828671186; Thu, 28 Mar 2019 20:04:31 -0700 (PDT) Received: from localhost.localdomain ([2001:268:c0a5:ba2:c70:4af9:86e2:2]) by smtp.gmail.com with ESMTPSA id k9sm661900pga.22.2019.03.28.20.04.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 20:04:30 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org, bgolaszewski@baylibre.com Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, geert@linux-m68k.org, preid@electromag.com.au, lukas@wunner.de, William Breathitt Gray Subject: [PATCH v14 05/11] gpio: gpio-mm: Utilize for_each_set_clump8 macro Date: Fri, 29 Mar 2019 12:05:27 +0900 Message-Id: <0090cb40d7eb69434210c1f3eeb32e0f952dee78.1553828158.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 73 +++++++++++-------------------------- 1 file changed, 21 insertions(+), 52 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index 8c150fd68d9d..0cef50d14c5a 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,25 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned long offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(gpiommgpio->base + ports[i]); + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + port_addr = gpiommgpio->base + ports[offset / 8]; + port_state = inb(port_addr) & gpio_mask; - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, port_state, offset); } return 0; @@ -242,37 +221,27 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; - unsigned int bitmask; + unsigned long offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; + unsigned long bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + index = offset / 8; + port_addr = gpiommgpio->base + ports[index]; - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + bitmask = bitmap_get_value8(bits, offset) & gpio_mask; spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[index] &= ~gpio_mask; + gpiommgpio->out_state[index] |= bitmask; + outb(gpiommgpio->out_state[index], port_addr); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.21.0