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From:   Naga Sureshkumar Relli <nagasure@xilinx.com>
To:     Helmut Grohne <helmut.grohne@intenta.de>
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        Michal Simek <michals@xilinx.com>,
        "nagasureshkumarrelli@gmail.com" <nagasureshkumarrelli@gmail.com>
Subject: RE: [LINUX PATCH v13] rawnand: pl353: Add basic driver for arm pl353
 smc nand interface
Thread-Topic: [LINUX PATCH v13] rawnand: pl353: Add basic driver for arm pl353
 smc nand interface
Thread-Index: AQHUwEH1zZQS3QRob0y10ZaiOKtLVqYeLsaAgAFJyICAAb/7AIABJDSg
Date:   Fri, 29 Mar 2019 05:21:29 +0000
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Hi Helmut,

> -----Original Message-----
> From: Helmut Grohne <helmut.grohne@intenta.de>
> Sent: Thursday, March 28, 2019 5:21 PM
> To: Naga Sureshkumar Relli <nagasure@xilinx.com>
> Cc: bbrezillon@kernel.org; miquel.raynal@bootlin.com; richard@nod.at;
> dwmw2@infradead.org; computersforpeace@gmail.com; marek.vasut@gmail.com; =
linux-
> mtd@lists.infradead.org; linux-kernel@vger.kernel.org; Michal Simek <mich=
als@xilinx.com>;
> nagasureshkumarrelli@gmail.com
> Subject: Re: [LINUX PATCH v13] rawnand: pl353: Add basic driver for arm p=
l353 smc nand
> interface
>=20
> Hi Naga,
>=20
> On Wed, Mar 27, 2019 at 09:13:59AM +0000, Naga Sureshkumar Relli wrote:
> > It's a on-die ECC capable device. Did u mentioned nand-ecc-mode =3D "on=
-die" in dts.
> > The same part I tested by mentioning "on-die" property in dts and it wo=
rked for me.
> > Please share the dts entries for NAND.
> > Also if it is x8 bus then please mention nand-bus-width =3D <8>; If it
> > is x16 mention nand-bus-width =3D <16>;
>=20
> Thank you for pointing at the relevant properties. Indeed, these were mis=
sing in my previous
> tests. I am now using the following dt (generated from multiple fragments=
, giving the
> decompiled dt here):
>=20
> | memory-controller@e000e000 {
> | 	#address-cells =3D <0x2>;
> | 	#size-cells =3D <0x1>;
> | 	status =3D "okay";
> | 	clock-names =3D "memclk", "apb_pclk";
> | 	clocks =3D <0x1 0xb 0x1 0x2c>;
> | 	compatible =3D "arm,pl353-smc-r2p1", "arm,primecell";
> | 	interrupt-parent =3D <0x4>;
> | 	interrupts =3D <0x0 0x12 0x4>;
> | 	ranges =3D <0x0 0x0 0xe1000000 0x1000000>;
> | 	reg =3D <0xe000e000 0x1000>;
> |
> | 	flash@e1000000 {
> | 		status =3D "okay";
> | 		compatible =3D "arm,pl353-nand-r2p1";
> | 		reg =3D <0x0 0x0 0x1000000>;
> | 		#address-cells =3D <0x1>;
> | 		#size-cells =3D <0x1>;
> | 		nand-ecc-mode =3D "on-die";
> | 		nand-ecc-algo =3D "hamming";
> | 		nand-bus-width =3D <0x8>;
> | 	};
> | };
>=20
> With this dt, the device is successfully initialized and the data read is=
 mostly intact. When
> using it with jffs2, I get loads of ECC errors though (offsets and length=
s vary):
>=20
> | jffs2: mtd->read(0x800 bytes from 0xb60000) returned ECC error
>=20
> Reverting back to the out-of-tree driver (4.14), it works normally, so a =
hardware defect seems
> unlikely. I compared a register dump of the smc between those drivers and=
 the only difference I
> could find was NAND timings (at 0xE000E180), which are much lower with th=
e new drivers
> as it does not consume the arm,nand-cycle-* properties that the old drive=
r consumed. I tried
> hard coding the previous timings, but the ECC errors persist. This leads =
me to conclude that
> timings are not the cause for what I am seeing.
>=20
> Is there anything else I can try to diagnose it?
Thanks for trying with new dts.
Previously we will pass the nand-cycle-* through dts.
But now framework is giving all the timing information of SDR. So we will j=
ust configure those
Timings. I will recheck the driver about the timings.

Till now I tried mtd-utils(mtd-debug) and ubifs.
I haven't tried jffs2. Let me give a try and will let you know.

Thanks,
Naga Sureshkumar Relli.
>=20
> Helmut