Received: by 2002:a25:5b86:0:0:0:0:0 with SMTP id p128csp1557540ybb; Fri, 29 Mar 2019 06:55:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqyXM5YEgGbs13n3xhIEjlWtDCpRnImxsxnq3LV+24Bj8qIawRZkph53Ty4O2hTFosdbIVec X-Received: by 2002:a17:902:aa85:: with SMTP id d5mr24636694plr.251.1553867743671; Fri, 29 Mar 2019 06:55:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553867743; cv=none; d=google.com; s=arc-20160816; b=oiAsrQ1Gesf0i0e8+GgDvddkLPVla9cy2IlOu8lNzxcmSc6YkxyntgKShcZQ0F91qI G6INd3V8hjPtle0S+drhkhdWT5hba44posefYgBcdV8AKX75893YHyc9lysyZO7Icxqp YYcviIG7Ad/aPsJIeLjNucTCKU+575m7pqEUEXRPDaS2UuASTBwr9PmElBbm96Q3m3dE CsMzyH4SjjptfgkYeDwEqtTegzpdhdoFkZcFRYespKRHS58r3cl8Wfpqa11eG88lo910 9oVPEomTim5tV4nV/mnuKq30DPJW4tm4Dri7Ei+LNt/H7UabF+HDxK2LM4CSRUS8RDMQ oYcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=YpFrn9k1/mgSkc4lBRjBNInAyK+fs4ULTMVqbS3jpXU=; b=MQNRNL0h2Lybz3zPF/Jw+JhlaGd+4F0Pe9zcDmjCzBaKchAfIQ/DOTzbc8oBIZfVJO +iV6B9vRcR9cthOZpas2FOO6E97jQ+QXmKGUeb1xUCHgN4hY1dIw9xbCrKWZEOMuuKfC AoBfRNM9/GfzrqyY+POQD9+wpitxv6xD7z47oTSFhpNmVupOBi76wM8FkPHmQCzd8jfk PV2P/tL/QSQn51J4TYM8KGKM/DxyPV07h0aONjXdsq/Kj788RZIoHrMizEFaqlwNzlao cy42lJml+sW7f0mY7h4bD16lLW3xQ/t8a4EQi7Toj4zjhpme0TIc3s5DiFSlHxF7UgHu K3qQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l14si1897036pfj.112.2019.03.29.06.55.27; Fri, 29 Mar 2019 06:55:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729728AbfC2Nyu (ORCPT + 99 others); Fri, 29 Mar 2019 09:54:50 -0400 Received: from mga03.intel.com ([134.134.136.65]:44836 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729666AbfC2Nyu (ORCPT ); Fri, 29 Mar 2019 09:54:50 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 06:54:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,284,1549958400"; d="scan'208";a="138342085" Received: from lxy-server.sh.intel.com ([10.239.48.11]) by orsmga003.jf.intel.com with ESMTP; 29 Mar 2019 06:54:47 -0700 From: Xiaoyao Li To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Xiaoyao Li , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , x86@kernel.org, chao.gao@intel.com, Sean Christopherson Subject: [PATCH v4 0/2] Switch MSR_MISC_FEATURES_ENABLES and one optimization Date: Fri, 29 Mar 2019 21:54:20 +0800 Message-Id: <20190329135422.15046-1-xiaoyao.li@linux.intel.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Patch 1 switches MSR_MISC_FEATURES_ENABLE between host and guest during vcpu_{load,put} to avoid cpuid faulting and ring3mwait of host leaking to guest. Because cpuid faulting eanbled in host may potentially cause guest boot failure, and kvm doesn't expose ring3mwait to guest yet. Both two features shouldn't be leaked to guest. Patch 2 optimizes the switch of MSR_MISC_FEATURES_ENABLES by avoiding WRMSR whenever possible to save cycles. ==changelog== v3->v4: remove the helper function, and some code refine. per Sean Christopherson's comments. v2->v3: - use msr_misc_features_shadow instead of reading hardware msr, from Sean Christopherson - avoid WRMSR whenever possible, from Sean Christopherson. v1->v2: - move the save/restore of cpuid faulting bit to vmx_prepare_swich_to_guest/vmx_prepare_swich_to_host to avoid every vmentry RDMSR, based on Paolo's comment. Xiaoyao Li (2): kvm/vmx: Switch MSR_MISC_FEATURES_ENABLES between host and guest x86/vmx: optimize MSR_MISC_FEATURES_ENABLES switch arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kernel/process.c | 1 + arch/x86/kvm/vmx/vmx.c | 17 +++++++++++++++++ arch/x86/kvm/x86.c | 11 ++++++++--- 4 files changed, 28 insertions(+), 3 deletions(-) -- 2.19.1