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[209.132.180.67]) by mx.google.com with ESMTP id w5si2139995pgs.268.2019.03.29.09.42.16; Fri, 29 Mar 2019 09:42:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b="p/Yzlayv"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729766AbfC2QiY (ORCPT + 99 others); Fri, 29 Mar 2019 12:38:24 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:38329 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728977AbfC2QiY (ORCPT ); Fri, 29 Mar 2019 12:38:24 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 44W6qd0lw0z9tyQQ; Fri, 29 Mar 2019 17:38:21 +0100 (CET) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=p/Yzlayv; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id RsawrZ9RIoUl; Fri, 29 Mar 2019 17:38:21 +0100 (CET) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 44W6qc6YhBz9tyQP; Fri, 29 Mar 2019 17:38:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1553877500; bh=KkMMyU5yrMV0ir5/+rw838T85TAoXc5QSadVbmSHECU=; h=From:Subject:To:Cc:Date:From; b=p/YzlayvuWdZO11rGcFVylBjXr7IGUTJy7EnbpAIg73sJB8y++eFsLsIdTrjilp+4 yBr8HTKe1UpOe4HAq9mej4jp6FQ7DFh6pBl6lwry+Z00L0KXpnZD0eCJ+I7Z/9e4zI NA30Q+on8I3lTkHqboDLZpBCdIt+5cpDMYvASl+c= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 802C98B93D; Fri, 29 Mar 2019 17:38:22 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id gpSeZ3rEmMjA; Fri, 29 Mar 2019 17:38:22 +0100 (CET) Received: from po16846vm.idsi0.si.c-s.fr (po15451.idsi0.si.c-s.fr [172.25.231.2]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 6416D8B938; Fri, 29 Mar 2019 17:38:22 +0100 (CET) Received: by po16846vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 508026FC56; Fri, 29 Mar 2019 16:38:22 +0000 (UTC) Message-Id: From: Christophe Leroy Subject: [PATCH v2 00/17] powerpc/32: Implement fast syscall entry To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Nicholas Piggin Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Date: Fri, 29 Mar 2019 16:38:22 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The purpose of this series is to implement a fast syscall entry on ppc32, as already done on ppc64. Unlike all other exceptions which can happen at any time and require to preserve all registers, the syscalls do not require the preservation of volatile registers (except LR). Syscall entries can then be optimised with lighter entry code than the general exception handling. In the meantime this series refactorises the exception entry on 40x/6xx/8xx as they are pretty similar, and it takes benh series on rationalising the settings of MSR_EE at exceptions/syscall entries as this change pretty simplies exception entries. On a 8xx, this series improves null_syscall selftest by 17% On a 83xx, this series improves null_syscall selftest by 12,5% v2: - Rebased on latest powerpc/merge branch. - Added booke support as well (tested on qemu bamboo). - Added a patch to get rid of the dummy frames when calling trace_hardirqs_on/off. Christophe Leroy (17): powerpc/32: Refactor EXCEPTION entry macros for head_8xx.S and head_32.S powerpc/32: move LOAD_MSR_KERNEL() into head_32.h and use it powerpc/32: make the 6xx/8xx EXC_XFER_TEMPLATE() similar to the 40x/booke one powerpc/40x: Don't use SPRN_SPRG_SCRATCH2 in EXCEPTION_PROLOG powerpc/40x: add exception frame marker powerpc/40x: Split and rename NORMAL_EXCEPTION_PROLOG powerpc/40x: Refactor exception entry macros by using head_32.h powerpc/fsl_booke: ensure SPEFloatingPointException() reenables interrupts powerpc/32: enter syscall with MSR_EE inconditionaly set powerpc/32: Enter exceptions with MSR_EE unset powerpc/32: get rid of COPY_EE in exception entry powerpc: Fix 32-bit handling of MSR_EE on exceptions powerpc/32: implement fast entry for syscalls on non BOOKE powerpc/32: implement fast entry for syscalls on BOOKE powerpc/32: Remove MSR_PR test when returning from syscall powerpc/32: don't do syscall stuff in transfer_to_handler powerpc/32: Don't add dummy frames when calling trace_hardirqs_on/off arch/powerpc/kernel/entry_32.S | 158 +++++++++++++-------------- arch/powerpc/kernel/head_32.S | 170 +++++++---------------------- arch/powerpc/kernel/head_32.h | 203 +++++++++++++++++++++++++++++++++++ arch/powerpc/kernel/head_40x.S | 152 +++++++------------------- arch/powerpc/kernel/head_44x.S | 9 +- arch/powerpc/kernel/head_8xx.S | 133 ++++------------------- arch/powerpc/kernel/head_booke.h | 131 +++++++++++++++++----- arch/powerpc/kernel/head_fsl_booke.S | 29 +++-- arch/powerpc/kernel/traps.c | 8 ++ 9 files changed, 508 insertions(+), 485 deletions(-) create mode 100644 arch/powerpc/kernel/head_32.h -- 2.13.3