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McKenney" To: "H. Peter Anvin" Cc: Alexander Potapenko , Peter Zijlstra , Ingo Molnar , LKML , Dmitriy Vyukov , James Y Knight Subject: Re: Potentially missing "memory" clobbers in bitops.h for x86 Reply-To: paulmck@linux.ibm.com References: <20190328162222.GO4102@linux.ibm.com> <8e32ab34-c14c-1ccb-76f9-0dcd729a0ef6@zytor.com> <20190329210918.GZ4102@linux.ibm.com> <8092b8aa-bb1c-0266-b308-5cebfb25e2ef@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8092b8aa-bb1c-0266-b308-5cebfb25e2ef@zytor.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 x-cbid: 19032922-0072-0000-0000-000004126606 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010837; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000283; SDB=6.01181543; UDB=6.00618423; IPR=6.00962264; MB=3.00026215; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-29 22:05:55 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032922-0073-0000-0000-00004BA5BB39 Message-Id: <20190329220554.GD4102@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-03-29_13:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903290150 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 29, 2019 at 02:51:26PM -0700, H. Peter Anvin wrote: > On 3/29/19 2:09 PM, Paul E. McKenney wrote: > >> > >> Note: the atomic versions of these functions obviously need to have > >> "volatile" and the clobber anyway, as they are by definition barriers > >> and moving memory operations around them would be a very serious error. > > > > The atomic functions that return void don't need to order anything except > > the input and output arguments. The oddness with clear_bit() is that the > > memory changed isn't necessarily the quantity referenced by the argument, > > if the number of bits specified is large. > > > > So (for example) atomic_inc() does not need a "memory" clobber, right? > > I don't believe that is true: the code calling it has a reasonable > expectation that previous memory operations have finished and later > memory operations have not started from the point of view of another > processor. You are more of an expert on memory ordering than I am, but > I'm 89% sure that there is plenty of code in the kernel which makes that > assumption. From Documentation/core-api/atomic_ops.rst: ------------------------------------------------------------------------ void atomic_add(int i, atomic_t *v); void atomic_sub(int i, atomic_t *v); void atomic_inc(atomic_t *v); void atomic_dec(atomic_t *v); These four routines add and subtract integral values to/from the given atomic_t value. The first two routines pass explicit integers by which to make the adjustment, whereas the latter two use an implicit adjustment value of "1". One very important aspect of these two routines is that they DO NOT require any explicit memory barriers. They need only perform the atomic_t counter update in an SMP safe manner. ------------------------------------------------------------------------ So, no, these functions do not imply any ordering other than to the variable modified. This one predates my joining the Linux kernel community. ;-) So any cases where someone is relying on atomic_inc() to provide ordering are bugs. Now for value-returning atomics, for example, atomic_inc_return(), full ordering is indeed required. Thanx, Paul