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From:   "Pandruvada, Srinivas" <srinivas.pandruvada@intel.com>
To:     "Yazen.Ghannam@amd.com" <Yazen.Ghannam@amd.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devel@acpica.org" <devel@acpica.org>,
        "Janakarajan.Natarajan@amd.com" <Janakarajan.Natarajan@amd.com>,
        "linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
        "linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
CC:     "lenb@kernel.org" <lenb@kernel.org>,
        "viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
        "Moore, Robert" <robert.moore@intel.com>,
        "Schmauss, Erik" <erik.schmauss@intel.com>,
        "rjw@rjwysocki.net" <rjw@rjwysocki.net>
Subject: Re: [PATCH 5/6] acpi/cppc: Add support for optional CPPC registers
Thread-Topic: [PATCH 5/6] acpi/cppc: Add support for optional CPPC registers
Thread-Index: AQHU5LR0lnkbassgoEK1gi6uIOOyFaYjhPcAgABq5IA=
Date:   Sat, 30 Mar 2019 02:40:41 +0000
Message-ID: <ccdecc9a3eb4cd0e930ce1dbe9f161cf37a71f07.camel@intel.com>
References: <cover.1553285718.git.Janakarajan.Natarajan@amd.com>
         <d16e973c3fa4343134f6d246cc424f29ff5d7dc9.1553285718.git.Janakarajan.Natarajan@amd.com>
         <f3a749646c66a84e17383204385d8c73750d4813.camel@intel.com>
         <SN6PR12MB26399489011DD026910B6049F85A0@SN6PR12MB2639.namprd12.prod.outlook.com>
In-Reply-To: <SN6PR12MB26399489011DD026910B6049F85A0@SN6PR12MB2639.namprd12.prod.outlook.com>
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On Fri, 2019-03-29 at 20:18 +0000, Ghannam, Yazen wrote:
> > -----Original Message-----
> > From: linux-acpi-owner@vger.kernel.org <
> > linux-acpi-owner@vger.kernel.org> On Behalf Of Pandruvada, Srinivas
> > Sent: Wednesday, March 27, 2019 10:48 AM
> > To: linux-kernel@vger.kernel.org; devel@acpica.org; Natarajan,
> > Janakarajan <Janakarajan.Natarajan@amd.com>; linux-
> > acpi@vger.kernel.org; linux-pm@vger.kernel.org
> > Cc: Ghannam, Yazen <Yazen.Ghannam@amd.com>; lenb@kernel.org;=20
> > viresh.kumar@linaro.org; Moore, Robert
> > <robert.moore@intel.com>; Schmauss, Erik <erik.schmauss@intel.com>;
> > rjw@rjwysocki.net
> > Subject: Re: [PATCH 5/6] acpi/cppc: Add support for optional CPPC
> > registers
> >=20
> > On Fri, 2019-03-22 at 20:26 +0000, Natarajan, Janakarajan wrote:
> > > From: Yazen Ghannam <Yazen.Ghannam@amd.com>
> > >=20
> > > Newer AMD processors support a subset of the optional CPPC
> > > registers.
> > > Create show, store and helper routines for supported CPPC
> > > registers.
> > >=20
> > > Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
> > > [ carved out into a patch, cleaned up, productized ]
> > > Signed-off-by: Janakarajan Natarajan <
> > > Janakarajan.Natarajan@amd.com>
> > >=20
> >=20
> > [..]
> >=20
> > > +	/* desired_perf is the only mandatory value in perf_ctrls */
> > > +	if (cpc_read(cpu, desired_reg, &desired))
> > > +		ret =3D -EFAULT;
> > > +
> > > +	if (CPC_SUPPORTED(max_reg) && cpc_read(cpu, max_reg, &max))
> > > +		ret =3D -EFAULT;
> > > +
> >=20
> > We should create and use different macro other than CPPC_SUPPORTED.
> > CPC_SUPPORTED doesn't validate the correctness of object type for a
> > field. For example "Maximum Performance Register" can only be
> > buffer
> > not integer. In this way invalid field definitions can be ignored.
> >=20
>=20
> So create something like "CPPC_SUPPORTED_BUFFER" for buffer-only
> registers?
>=20
> And then buffer/integer registers will continue to use
> "CPPC_SUPPORTED".
>=20
> These seem to be the only two cases at this time. Is this okay?
Yes.

Thanks,
Srinivas

>=20
> Thanks,
> Yazen
>=20
> >=20
> > > +	if (CPC_SUPPORTED(min_reg) && cpc_read(cpu, min_reg, &min))
> > > +		ret =3D -EFAULT;
> > > +
> > > +	if (CPC_SUPPORTED(energy_reg) && cpc_read(cpu, energy_reg,
> > > &energy))
> > > +		ret =3D -EFAULT;
> > > +
> > > +	if (CPC_SUPPORTED(auto_sel_enable_reg) &&
> > > +	    cpc_read(cpu, auto_sel_enable_reg, &auto_sel_enable))
> > > +		ret =3D -EFAULT;
> > > +
> >=20
> > Here it is fine to use CPC_SUPPORTED as the "Autonomous Selection
> > Enable" can be both integer and buffer.
> >=20
> > Thanks,
> > Srinivas
>=20
>=20

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