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[209.132.180.67]) by mx.google.com with ESMTP id i20si5743975pfd.204.2019.03.30.23.43.10; Sat, 30 Mar 2019 23:43:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731245AbfCaGlk (ORCPT + 99 others); Sun, 31 Mar 2019 02:41:40 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:41722 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731235AbfCaGlk (ORCPT ); Sun, 31 Mar 2019 02:41:40 -0400 Received: by mail-pf1-f195.google.com with SMTP id 188so2981184pfd.8; Sat, 30 Mar 2019 23:41:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:date:from:to:cc:subject:references :mime-version:content-disposition:in-reply-to; bh=dN6jornbGP4wNZ9WHQNjirl7vb53eCYIGpQZYJZAn2A=; b=W9i2bf3a0LoWQ+BUPs4NSf7GrSCpEPd/E+IGxgWA5dzomSavXktHrF8ZJEoubSRAEi n0Uo+S1Z3lVKgC3tnXkGin7TekA2JTIY3rzpyn3AMvY9kwDXwsGtNhIVgBzpL6b3YpbX ttByFtgbzPL8oAGo+dqRXw8gwFyYdbOm6e19B5d/Ur7++OQg45tmC3SqNG4j5wF9InV5 qX6VPc53gzdsKnSMzi2k03Uymb3M3oQABJdiCGYubIK/e4/xywzxGjVQBVfzJQ4odLMG 5cQel3xl5ESqPrPZtaovVSvfuTrBn8ZbQcl+NrxpXrRzR1adrKUxGCsbiu+d9ikX9MG2 j68Q== X-Gm-Message-State: APjAAAXIXKUnVaXggrGHCth+tbIek27blOefXC675EaA/Nto7wqtPFhn bsJv0ajf/7TVusQwCskYxFW0pbwdxA== X-Received: by 2002:a63:36ce:: with SMTP id d197mr5145626pga.180.1554014499432; Sat, 30 Mar 2019 23:41:39 -0700 (PDT) Received: from localhost ([210.160.217.68]) by smtp.gmail.com with ESMTPSA id t3sm7957799pgv.39.2019.03.30.23.41.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 30 Mar 2019 23:41:38 -0700 (PDT) Message-ID: <5ca06122.1c69fb81.1f767.5d1d@mx.google.com> Date: Sun, 31 Mar 2019 01:41:36 -0500 From: Rob Herring To: qiaozhou Cc: Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 4/7] dt-bindings: serial: add ASR8751C serial bindings References: <1553349688-1946-1-git-send-email-qiaozhou@asrmicro.com> <1553349688-1946-5-git-send-email-qiaozhou@asrmicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1553349688-1946-5-git-send-email-qiaozhou@asrmicro.com> X-Mutt-References: <1553349688-1946-5-git-send-email-qiaozhou@asrmicro.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Mar 23, 2019 at 10:01:25PM +0800, qiaozhou wrote: > From: Qiao Zhou > > Add binding documentation for ASR8751C serial device. > > Signed-off-by: qiaozhou > --- > .../devicetree/bindings/serial/asr-serial.txt | 23 ++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > create mode 100644 Documentation/devicetree/bindings/serial/asr-serial.txt > > diff --git a/Documentation/devicetree/bindings/serial/asr-serial.txt b/Documentation/devicetree/bindings/serial/asr-serial.txt > new file mode 100644 > index 0000000..9e0e191 > --- /dev/null > +++ b/Documentation/devicetree/bindings/serial/asr-serial.txt > @@ -0,0 +1,23 @@ > +* UART Controller of ASR8751C SoCs > + > +Required properties: > +- compatible : should be "asr,uart" Needs an SoC specific compatible. > +- reg: iomem address and length of uart registers > +- interrupts : Should be the interrupt number > +- clocks: clock required by uart > +- clock-frequency: frequency of clock source > +- dmas: dma channel used by uart tx or rx > +- dma-names: dma name of uart tx or rx > + > +Example: > + > + uart0: uart@d4017000 { > + compatible = "asr,uart"; > + reg = <0xd4017000 0x1000>; > + interrupts = <0 32 0x4>; > + clock-frequency = <13000000>; > + dmas = <&pdma0 AP_UART0_RX 1 > + &pdma0 AP_UART0_TX 1>; > + dma-names = "rx", "tx"; > + clocks = <&soc_clocks ASR_CLK_UART0>; > + }; > -- > 2.7.4 >