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[209.132.180.67]) by mx.google.com with ESMTP id a95si7322241pla.350.2019.03.31.07.41.31; Sun, 31 Mar 2019 07:41:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=BeOtk0my; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731241AbfCaOkt (ORCPT + 99 others); Sun, 31 Mar 2019 10:40:49 -0400 Received: from mail-it1-f194.google.com ([209.85.166.194]:52494 "EHLO mail-it1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726863AbfCaOks (ORCPT ); Sun, 31 Mar 2019 10:40:48 -0400 Received: by mail-it1-f194.google.com with SMTP id g17so10724923ita.2; Sun, 31 Mar 2019 07:40:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=kP40pwhes3z+V/FQcEriWr3dXl37/tkssjSAFxgoicg=; b=BeOtk0myR2QvCTVMq95f9ZLIH7sP/u9zAnascKVRy4Zcmld4wolJKKsYdCI9qdnfCR cG1eoSHHLF/5OWp2mPm4OUO7fMUgNCNu1Gcl5L2KXSDmx/nRFapTHeycjRHRbFWyJco8 ng7FC+zQ6Y2iTUdFqvmnfTmEFuKMLSQMs07Xpzqea/ZMI3KUxKFNN3/ryRVRNnmgFgcE FUts0kNH5PjztbXNLmuroPrx2QpWrVSFlm9+9DYAHvjfLemcpUtpSpahpE0R00Vmmey/ rNdcaqxFsX0iGWgTJ4tkTOJmegcvJTD79BOlvAuXYbpZ1rXKW9GfTIHyoU9Ym/72enJX tKLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kP40pwhes3z+V/FQcEriWr3dXl37/tkssjSAFxgoicg=; b=HH8loItn0J7khhAquEuvhTQJM73OGKd5Lqh8xKj6k/72LojrwB4t3CIgyVHJotozXs fPCdbDyMrcI03zHZxWOkS/b0xftB5joZBQDM/1vgY+2UslNV5MBJTr3rrcYWzSFqCKmL oLHpXwPku/coipOC0yqkJRxWkw04GOYYQ3lIGNfNy+IQd1vg6izuReX4DtXd3SKnNfLU 06QX5tgEpfUrSJtbN0x4dudU9JWw0vz1RevUshPK/DPAmq9slQOhyp0GmdGHZw+QYSIZ FBtHeCVyzJD0MX5hcQVl+fAUlVaA3d2D/aJsCISQLtlMDZDn/0wDO9zKsEXC6lWqEoqQ f1bg== X-Gm-Message-State: APjAAAWAtViFhoaFf4Rv+C5pOc+SIYhZVB1WxllNTfryWDrXjFfBjWzT Yyc5Oix1BsYIJVf/tdYIBTftGtiZM6kCORA4hT0= X-Received: by 2002:a24:5493:: with SMTP id t141mr10511008ita.10.1554043247456; Sun, 31 Mar 2019 07:40:47 -0700 (PDT) MIME-Version: 1.0 References: <1549572447-45456-1-git-send-email-justinpopo6@gmail.com> In-Reply-To: <1549572447-45456-1-git-send-email-justinpopo6@gmail.com> From: Kamal Dasu Date: Sun, 31 Mar 2019 10:40:35 -0400 Message-ID: Subject: Re: [PATCH] spi: bcm-qspi: when tx/rx buffer is NULL set to 0 To: justinpopo6@gmail.com Cc: linux-spi , bcm-kernel-feedback-list@broadcom.com, Mark Brown , Linux Kernel Mailing List , Florian Fainelli Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 7, 2019 at 3:47 PM wrote: > > From: Justin Chen > > Currently we set the tx/rx buffer to 0xff when NULL. This causes > problems with some spi slaves where 0xff is a valid command. Looking > at other drivers, the tx/rx buffer is usually set to 0x00 when NULL. > Following this convention solves the issue. > > Fixes: fa236a7ef240 ("spi: bcm-qspi: Add Broadcom MSPI driver") > Signed-off-by: Justin Chen Signed-off-by: Kamal Dasu > --- > drivers/spi/spi-bcm-qspi.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c > index 584bcb0..79456aa 100644 > --- a/drivers/spi/spi-bcm-qspi.c > +++ b/drivers/spi/spi-bcm-qspi.c > @@ -681,7 +681,7 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots) > if (buf) > buf[tp.byte] = read_rxram_slot_u8(qspi, slot); > dev_dbg(&qspi->pdev->dev, "RD %02x\n", > - buf ? buf[tp.byte] : 0xff); > + buf ? buf[tp.byte] : 0x00); > } else { > u16 *buf = tp.trans->rx_buf; > > @@ -689,7 +689,7 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots) > buf[tp.byte / 2] = read_rxram_slot_u16(qspi, > slot); > dev_dbg(&qspi->pdev->dev, "RD %04x\n", > - buf ? buf[tp.byte] : 0xffff); > + buf ? buf[tp.byte] : 0x0000); > } > > update_qspi_trans_byte_count(qspi, &tp, > @@ -744,13 +744,13 @@ static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi) > while (!tstatus && slot < MSPI_NUM_CDRAM) { > if (tp.trans->bits_per_word <= 8) { > const u8 *buf = tp.trans->tx_buf; > - u8 val = buf ? buf[tp.byte] : 0xff; > + u8 val = buf ? buf[tp.byte] : 0x00; > > write_txram_slot_u8(qspi, slot, val); > dev_dbg(&qspi->pdev->dev, "WR %02x\n", val); > } else { > const u16 *buf = tp.trans->tx_buf; > - u16 val = buf ? buf[tp.byte / 2] : 0xffff; > + u16 val = buf ? buf[tp.byte / 2] : 0x0000; > > write_txram_slot_u16(qspi, slot, val); > dev_dbg(&qspi->pdev->dev, "WR %04x\n", val); > -- > 2.7.4 >