Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp2167578yba; Wed, 3 Apr 2019 02:43:33 -0700 (PDT) X-Google-Smtp-Source: APXvYqypw2CmLN1GWYEUi0djg81Jh3lJ2VDWIIOwl8ZpgKou12fha6ih64QcCoM+3lhSVCs9hMc3 X-Received: by 2002:a17:902:2b88:: with SMTP id l8mr23658399plb.262.1554284613526; Wed, 03 Apr 2019 02:43:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554284613; cv=none; d=google.com; s=arc-20160816; b=gOMpNFNOVX9QMgVWPAIOAorKsprZKxoWi0CAi4u1va0rK/5siNUI6vem5KTBd5x+7/ +WtRHJIj0jEY0dACQaCE7J8E1kgnY4KgXKnUDR0gBR5Bii9oS2l45wYt6UjRdWdjfqsm Dwkl7HoLJFWiMvSM8M1c4Efzz9npkgL+QhLNGs0QmxtHuPdf9cFLNhxdM74sSw8yAnnM Yc7WXl5GlX3NqbzFJMh1R1NdOiHN34a9KszR4IfGVwAAoOUpbu/J+TGzUq78GI88Tl52 Vh9nRZh8SmZ4kRbOUHKO8MijIyjNEnXKY/6i04US/hBijkDf1BY6S0KqXwFXGd9x7ys9 l/qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=LHq9goGwusBYS2P9Tqi/vs6iUk8C+xLSBQrVQCrfOOs=; b=nVGjuxJrveAaK6TRuGJIOysx501dIWcXIEbjbKpr4XSZ0QoihA8jhfqvgJbKpMWbZZ t4/bSY362MFX6JXV5o+OPrT4e378gmBJNw/t8lqhw/+6zCbV7LRB7I+1n4YC29I0irrF uDR4YhMfiTfq4Rr/TtgvAgAZc0aVerXZs8cp0BrCOQlC2WjmVwjcMlWhpO2lRoYlzax1 zy2wxg8RbTNJNXaxXX3A50xEGb9j1JXAnN8vk5Opvebgosezul+yHiqcjcE0xZRcww2G 7G8ia3mtfkij6SICI9Lj6o1xMe85TTwHvujwY0pZg/Ua9bLNfGtnAdZTkhYAA4wYJofN 2Odg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m3si13119399pfh.249.2019.04.03.02.43.18; Wed, 03 Apr 2019 02:43:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726415AbfDCJmj (ORCPT + 99 others); Wed, 3 Apr 2019 05:42:39 -0400 Received: from regular1.263xmail.com ([211.150.70.200]:58060 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725940AbfDCJmi (ORCPT ); Wed, 3 Apr 2019 05:42:38 -0400 Received: from zhangqing?rock-chips.com (unknown [192.168.167.130]) by regular1.263xmail.com (Postfix) with ESMTP id 65242340; Wed, 3 Apr 2019 17:42:35 +0800 (CST) X-263anti-spam: KSV:0;BIG:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ADDR-CHECKED4: 1 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ANTISPAM-LEVEL: 2 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P18217T139987412580096S1554284546411238_; Wed, 03 Apr 2019 17:42:28 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <74f47f99bc0cbdefabe3b9299eab2085> X-RL-SENDER: zhangqing@rock-chips.com X-SENDER: zhangqing@rock-chips.com X-LOGIN-NAME: zhangqing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Elaine Zhang To: heiko@sntech.de Cc: mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, xxx@rock-chips.com, xf@rock-chips.com, huangtao@rock-chips.com, Elaine Zhang Subject: [PATCH v1 0/6] clk: rockchip: Support for some new features Date: Wed, 3 Apr 2019 17:42:23 +0800 Message-Id: <1554284549-24916-1-git-send-email-zhangqing@rock-chips.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1. Support for some new features 2. fix up some error Elaine Zhang (4): clk: rockchip: fix up the frac clk get rate error clk: rockchip: add a clock-type for muxes based in the pmugrf clk: rockchip: add pll up and down when change pll freq clk: rockchip: support pll setting by auto Finley Xiao (2): clk: rockchip: Add supprot to limit input rate for fractional divider clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type drivers/clk/rockchip/clk-pll.c | 234 +++++++++++++++++++++++++++++++++++--- drivers/clk/rockchip/clk-px30.c | 29 ++--- drivers/clk/rockchip/clk-rk3036.c | 13 ++- drivers/clk/rockchip/clk-rk3128.c | 15 ++- drivers/clk/rockchip/clk-rk3188.c | 24 ++-- drivers/clk/rockchip/clk-rk3228.c | 18 +-- drivers/clk/rockchip/clk-rk3288.c | 19 ++-- drivers/clk/rockchip/clk-rk3328.c | 17 +-- drivers/clk/rockchip/clk-rk3368.c | 17 +-- drivers/clk/rockchip/clk-rk3399.c | 32 +++--- drivers/clk/rockchip/clk-rv1108.c | 14 ++- drivers/clk/rockchip/clk.c | 48 ++++++-- drivers/clk/rockchip/clk.h | 50 +++++++- include/linux/clk-provider.h | 2 + 14 files changed, 423 insertions(+), 109 deletions(-) -- 1.9.1