Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp73585yba; Wed, 3 Apr 2019 04:53:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqy1N/Z3RGUtPOLwnP/OsBf/bqRlcVXrR2g+WpAzf2btgXKhq5K2c564WqLJebSkRzmor9Ja X-Received: by 2002:a17:902:26f:: with SMTP id 102mr11587074plc.175.1554292395080; Wed, 03 Apr 2019 04:53:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554292395; cv=none; d=google.com; s=arc-20160816; b=0jFmKDEYvMi4RTSMXn8kcXDGLmijAB2fnpRvu4mF6Y3ByDFtUuDRo9p3yUWUfNWE1k dFazxJEfm/5yIbsBN3/h2C1osaOz9MmC0xuzFFuCnRL6ndA5PiNsmjp3ZAyL2cYT0p6D 0dYgAnm3jqQcziCwUpfQtzO5PjP93++NqU29Ot/RiW77IK8ju5jL8ACA77bqsiQC+TNh prIw5sCgTrQawalILW20CschIr/q0u+tzcyeyKmZGksGo6KZY8xb/1HUgyHsC10+M5ZK gdP7orAZaQsEmxaY76PhPVXVp0IgjZnKJWNa2RiwiaMs99/EFL0PoDqJesAWsTVHMeOe oTOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-transfer-encoding:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=LeBuh7e0xo0Yd76B7jQlnsPL/L3qs0Zl4qYNPHHmMOY=; b=vpQXEJdspyDEtU0ga9vee6rpHWv1EV6oj0aWILk6GR5EV3GhmcTtxrbWXkykKCmK+e fi9a4oUzA+7StRHB4t47T+yDQlbRU1XgI/drpDJZ4KEOiwKaCLWnpRJiXsjjsUhfeuLa xzPdm/8RTnFV1kEBl7DxG7LvQ7JKU5SmIReueRnXdEBZ0X57J1pjBgIpyyXvQ+55Adf3 vTa8jBATUgmZDAHaBCrsCpDHAkPikXygsx/QbJZe0EAoZIEHC8oNYndvD1EhmiQICTtL 6Vg+grpUGdwDh2sixpvvbmEJi2xiIcRzrtgKFN1XEHzZtp8FVWmI0FNspOJ1JWiRVaGY 8p0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TvaVhol5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m17si13925639pgi.514.2019.04.03.04.52.59; Wed, 03 Apr 2019 04:53:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TvaVhol5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726360AbfDCLv6 (ORCPT + 99 others); Wed, 3 Apr 2019 07:51:58 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:43425 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726263AbfDCLv6 (ORCPT ); Wed, 3 Apr 2019 07:51:58 -0400 Received: by mail-pg1-f196.google.com with SMTP id z9so8201177pgu.10 for ; Wed, 03 Apr 2019 04:51:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=LeBuh7e0xo0Yd76B7jQlnsPL/L3qs0Zl4qYNPHHmMOY=; b=TvaVhol5+sQ1aSflJzOOq+xJBpNK4vL+0aZsFrWXQhiaku4thAPRZ750FooRgTTomI fwGdLV3IF0YwZgrqbcunIikUPTnbaz+ODFkjSi1Co3Y9f2aBM1vcwmRrTR5wRch7bUK7 I45Uu6IPhu7Nqi1mUi5nbnhUk9SrefEvqesMvz2dinE9iIEYAt2Ve0cVbL8ZvFV/G0RS X1Rj3/PzL+dANftAfkhcLQHm+Y86I9qvIDifhOD66nrJOQTdMnCldkK+bc/e6OSFDQFl MssqAHt2QPQFzh4gQLgfykIYAqVYQYDNNkRHU6v7Z+e9btnrlkhIIcTwL3uRiaYLEgx5 TRHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=LeBuh7e0xo0Yd76B7jQlnsPL/L3qs0Zl4qYNPHHmMOY=; b=C1JwNIfKF/stZDSkzhKtSP8etzcAJdl5A+aj6iqGVzEr/KaxvgHjE/7HIFfIEAwtSB /1//ew5gEE19ZO3L0yY8l0r5B0J1vSSrIksIsOZHfWVKe8ll4yvyovrx8N6Tq3ufUZyY vcfD3K4FHWii3gLuxCsqRFkj8fhr9kdeDOtP0/Hdmk+XJWMbnXwu5CoaCJdrfw3I8PAm dusgogh2hDN+43Yvnmrgoojd8Ifr9h+eyWBlxNje7EcWSkY5N+LjIzxtikNqwZZZg5Jn Y9h6A6CDIoctS+YsOszXLq03AHpCLmg5EHVX7Kz8A3vb2jAIzFWSqcKVK9QIOv88FMvG CG7g== X-Gm-Message-State: APjAAAVWR+1rAuCWLQFDTF6ygRt/3LtTDjtSa+zmEYkc1pQKJArH5MvY 5U81HEeoRODXndR3PHFrCKgKljsApA0a6w== X-Received: by 2002:a63:4819:: with SMTP id v25mr2464895pga.412.1554292316602; Wed, 03 Apr 2019 04:51:56 -0700 (PDT) Received: from dell ([147.50.13.10]) by smtp.gmail.com with ESMTPSA id s15sm19137510pga.71.2019.04.03.04.51.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 04:51:55 -0700 (PDT) Date: Wed, 3 Apr 2019 12:51:46 +0100 From: Lee Jones To: Mason Yang Cc: broonie@kernel.org, marek.vasut@gmail.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, bbrezillon@kernel.org, dwmw2@infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, computersforpeace@gmal.com, paul.burton@mips.com, stefan@agner.ch, christophe.kerello@st.com, liang.yang@amlogic.com, geert@linux-m68k.org, devicetree@vger.kernel.org, marcel.ziswiler@toradex.com, linux-mtd@lists.infradead.org, richard@nod.at, miquel.raynal@bootlin.com, juliensu@mxic.com.tw, zhengxunli@mxic.com.tw Subject: Re: [PATCH 4/7] dt-bindings: mfd: Document Macronix MX25F0A controller bindings Message-ID: <20190403115146.GR11301@dell> References: <1553768318-23149-1-git-send-email-masonccyang@mxic.com.tw> <1553768318-23149-5-git-send-email-masonccyang@mxic.com.tw> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1553768318-23149-5-git-send-email-masonccyang@mxic.com.tw> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 28 Mar 2019, Mason Yang wrote: > Document the bindings used by the Macronix MX25F0A MFD controller. > > Signed-off-by: Mason Yang > --- > .../devicetree/bindings/mfd/mxic-mx25f0a.txt | 66 ++++++++++++++++++++++ > 1 file changed, 66 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > > diff --git a/Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt b/Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > new file mode 100644 > index 0000000..53b4839 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > @@ -0,0 +1,66 @@ > +Macronix MX25F0A Multi-Function Device Tree Bindings > +---------------------------------------------------- > + > +MX25F0A is a MultiFunction Device with SPI and raw NAND, which > +supports either spi host controller or raw nand controller. > + > +Required properties: > +- compatible: should be "mxic,mx25f0a-mfd" > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- reg: should contain 2 entries, one for the registers and one for the direct > + mapping area in SPI mode. > +- reg-names: should contain "regs" and "dirmap" > +- interrupts: interrupt line connected to this MFD controller > + > +Required nodes: > + - spi : > + Node for configuring the SPI controller driver. > + Required properties: > + - compatible = "mxicy,mx25f0a-spi"; > + - clock-names: should contain "ps_clk", "send_clk" and > + "send_dly_clk" > + - clocks: should contain 3 entries for the "ps_clk", "send_clk" > + and "send_dly_clk" clocks > + > +- nand : > + Node for configuring the raw nand controller driver. > + Required properties: > + - compatible = "mxicy,mx25f0a-nand-ctlr"; > + - nand-ecc-mode = "soft"; > + - nand-ecc-algo = "bch"; > + > +Example: > + > + mxic: mx25f0a-mfd@43c30000 { I'm not sure I understand why you are using an MFD for this. > + compatible = "mxic,mx25f0a-mfd"; > + reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; > + reg-names = "regs", "dirmap"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* either spi or nand */ > + spi { > + compatible = "mxicy,mx25f0a-spi"; > + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; > + clock-names = "send_clk", "send_dly_clk", "ps_clk"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <25000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + }; > + }; > + > + nand { > + compatible = "mxicy,mx25f0a-nand-ctlr"; > + nand-ecc-mode = "soft"; > + nand-ecc-algo = "bch"; > + nand-ecc-step-size = <512>; > + nand-ecc-strength = <8>; > + }; > + }; Why not just select one using device tree alone, by: spi@43c30000 { compatible = "mxicy,mx25f0a-spi"; reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; reg-names = "regs", "dirmap"; #address-cells = <1>; #size-cells = <0>; clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; clock-names = "send_clk", "send_dly_clk", "ps_clk"; #address-cells = <1>; #size-cells = <0>; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <25000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; }; }; OR ... nand@43c30000 { compatible = "mxicy,mx25f0a-nand-ctlr"; reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; reg-names = "regs", "dirmap"; #address-cells = <1>; #size-cells = <0>; nand-ecc-mode = "soft"; nand-ecc-algo = "bch"; nand-ecc-step-size = <512>; nand-ecc-strength = <8>; }; -- Lee Jones [李琼斯] Linaro Services Technical Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog