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received-spf: None (protection.outlook.com: xilinx.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: UyWLMtgMylzf9+JyOq0DDp7X3c+qUyxbH2hojc+XoBrSwOeYTXH12qyiE9xjKdzwqZxYgTgRg7IOOtu8L6XTwRAheHUiylJF0/R/96xmCjseoEC1565Qu1/4DNAHqs9BsUuC1nQrkisu9WyEF+U3Ik5pOiudqjj5JpzeEP1Vw3kOz/0CEygitfjJOfkc+HBAbB++6j81ewRdOaY/dfHEmqyolY+IeGctWJyjSOf4OarWI4X3uvxShwe5DGU9q/yXcJZHdNOzjsMohR/rMtxGandT2n0XM9fGpLJQJlNPM7nnjhKn54V2t8vtLT1hVlUgSG6q0xbcnWJUJwWDQivVYRm4jcEkCg6eM0kY5irGIBf2uQX1VE5Cx2L33vVOlRAeeGn/R+zDJT+Hp2Mi6HfQlk0fZek2+etOCeLqUnOCa3I= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7b279957-daa7-4abd-d477-08d6b8f371d8 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Apr 2019 11:48:24.3891 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR02MB3345 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Mon, Apr 01, 2019 at 05:00:40PM +0000, Bharat Kumar Gogada wrote: > > Hi All, > > > > Please let me know if anyone has any inputs on this. > > > > Regards, > > Bharat > > > > > > The current Multi MSI data programming fails if multiple end points > > > requesting MSI and multi MSI are connected with switch, i.e the > > > current multi MSI data being given is not considering the number of > > > vectors being requested in case of multi MSI. > > > Due to this if multiple end points are connected and requesting MSI > > > and multi MSI combination, the multi MSI data is ending up using > > > wrong MSI data, which might be used by different device. > > > > > > Fix Multi MSI data programming with required alignment by using > > > number of vectors being requested. >=20 > I still do not understand what you mean I am sorry. An example is worth > two thousand words, I would start with that as it stands this commit log > does not provide any information on what you are actually fixing. > Hi Lorenzo, Thanks for your time.=20 Yes, will add an example to describe the problem. =20 Regards, Bharat > > > Fixes: ab597d35ef11 ("PCI: xilinx-nwl: Add support for Xilinx NWL > > > PCIe Host > > > Controller") > > > Signed-off-by: Bharat Kumar Gogada > > > > --- > > > V2: > > > - Added more description of fix > > > --- > > > drivers/pci/controller/pcie-xilinx-nwl.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c > > > b/drivers/pci/controller/pcie-xilinx-nwl.c > > > index 81538d7..36669c5 100644 > > > --- a/drivers/pci/controller/pcie-xilinx-nwl.c > > > +++ b/drivers/pci/controller/pcie-xilinx-nwl.c > > > @@ -484,7 +484,7 @@ static int nwl_irq_domain_alloc(struct > > > irq_domain *domain, unsigned int virq, > > > > > > mutex_lock(&msi->lock); > > > bit =3D bitmap_find_next_zero_area(msi->bitmap, INT_PCI_MSI_NR, 0, > > > - nr_irqs, 0); > > > + nr_irqs, nr_irqs - 1); > > > if (bit >=3D INT_PCI_MSI_NR) { > > > mutex_unlock(&msi->lock); > > > return -ENOSPC; > > > -- > > > 2.7.4 > >