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[209.132.180.67]) by mx.google.com with ESMTP id w3si7585124plp.260.2019.04.04.23.01.58; Thu, 04 Apr 2019 23:02:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@brainfault-org.20150623.gappssmtp.com header.s=20150623 header.b=wCbRnxyN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726765AbfDEGBY (ORCPT + 99 others); Fri, 5 Apr 2019 02:01:24 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:45443 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725955AbfDEGBX (ORCPT ); Fri, 5 Apr 2019 02:01:23 -0400 Received: by mail-wr1-f67.google.com with SMTP id s15so6417198wra.12 for ; Thu, 04 Apr 2019 23:01:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=8I8m7SSC/snr0cHsf2WBlkwE7bpgw/OQ5jKqCBoq9zo=; b=wCbRnxyNLYVi4sK6lQm7TJGYYG8lp5FUVtlVJG6aY097PpRMyg6nRbW3h2OU3mSmfe Z/2Dd8toqy/+d6M+wypyVE/QVDncGTa90b1UkJfwIrQdzuLnvUkdcYFDAnM9Pg4NDgvE xWwhtsVCZXpR94MvLQhD9J+Iuo02G1yg4J5zd+36PXDualUnZZy67CzbtmfaeQp5oJGz YyfQl89/SCjIQE2ijWgHUamQ5RrB53vkpNljo5f71agmlbc08SAaX7tnkF96x1DeIlag g//su1j0BxdcEU4uEkmNQ8DrN8Isruybr4p83MLzgLo7SeNQj6ALF8FDr7PEWHr+zgwz tCSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=8I8m7SSC/snr0cHsf2WBlkwE7bpgw/OQ5jKqCBoq9zo=; b=kv+AfiPJlS6fOdqcVcVcKxKrdh5K4SmqACCK1tmwDZToZ+BkhezE4UT+tfoOPh9At6 6XIO/2hTSmgx/fyi4Pbp+gCcpVWURA1FKsGVfV2+6fyXKGqjEHj1B8U0mxwSCayVoE/Z sNc90yu84NGo2I966i09XLDsrlzhosuwJfXXXpPNsEOInJmIIi7I/tsz7UeJiEYjRBzW L/ho/HiPEG3ZZIblH6iImKBH9J3sIAz6O4FaPDqxnDjeArXkr1JaQTICkMCEowKy0I56 o2VdMcfY1hSm67SPPpDEH1KYQVAH5+pVqMuk6krCgOWZRWrFTK1lVy1yEYkEmgOdVMVZ e2nQ== X-Gm-Message-State: APjAAAWhkZpJ88p7kKkSI8D9Vamy3EXKsA5aZQYuYNRKmDOusivT+n08 3Em7G1fSRuWTa9LhM/3D7W6xKyOZGqJJ0hxQEd8wP30WtoYokA== X-Received: by 2002:adf:f6c8:: with SMTP id y8mr6002760wrp.61.1554444081974; Thu, 04 Apr 2019 23:01:21 -0700 (PDT) MIME-Version: 1.0 References: <20190405054909.3238-1-anup.patel@wdc.com> <20190405055421.GA7087@infradead.org> In-Reply-To: <20190405055421.GA7087@infradead.org> From: Anup Patel Date: Fri, 5 Apr 2019 11:31:11 +0530 Message-ID: Subject: Re: [PATCH v3] RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems To: Christoph Hellwig Cc: Anup Patel , Palmer Dabbelt , Albert Ou , Atish Patra , Paul Walmsley , Mike Rapoport , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 5, 2019 at 11:24 AM Christoph Hellwig wrote: > > On Fri, Apr 05, 2019 at 05:49:34AM +0000, Anup Patel wrote: > > The Maximum Physical Memory 2GiB option for 64bit systems is currently > > broken because kernel hangs at boot-time when this option is enabled > > and the underlying system has more than 2GiB memory. > > > > This issue can be easily reproduced on SiFive Unleashed board where > > we have 8GiB of memory. > > > > This patch fixes above issue by removing unusable memory region in > > setup_bootmem(). > > > > Signed-off-by: Anup Patel > > Reviewed-by: Christoph Hellwig > > Btw, what is the rationale behind even offering the 2GiB option and > the medlow model on 64-bit? Do we reall have use cases where the > slightly more effient generated code matters so much to keep up > the support burden of this mostly unused and unusual configuration? Yes, if we want to use medlow with 64bit then max physical memory can be 2GiB. Otherwise, I don't any practical use of restricting max physical memory to 2GiB on 64bit systems. BTW, as-per latest revision of RISC-V priviledge spece the MMU SV32 mode will be able to access 34bit physical memory (i.e. 16GiB) so max physical memory 2GiB will also be required for 32bit system for medlow. Regards, Anup