Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Content-Type: text/plain;
        charset=utf-8
Mime-Version: 1.0 (1.0)
Subject: Re: [patch V2 28/29] x86/irq/64: Remap the IRQ stack with guard pages
From:   Andy Lutomirski <luto@amacapital.net>
In-Reply-To: <alpine.DEB.2.21.1904071132120.1840@nanos.tec.linutronix.de>
Date:   Sun, 7 Apr 2019 07:03:41 -0700
Cc:     Andy Lutomirski <luto@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>, X86 ML <x86@kernel.org>,
        Josh Poimboeuf <jpoimboe@redhat.com>,
        Sean Christopherson <sean.j.christopherson@intel.com>
Content-Transfer-Encoding: quoted-printable
Message-Id: <FC80432F-4880-442F-80CE-70F3564B327D@amacapital.net>
References: <20190405150658.237064784@linutronix.de> <20190405150930.967389183@linutronix.de> <CALCETrWF_YgQODJ=Rpm2MnhFxJXCfoo4H792hUQni0GS9on7og@mail.gmail.com> <alpine.DEB.2.21.1904070803200.1840@nanos.tec.linutronix.de> <50F7A079-11F5-45EA-B378-7527B5920A7C@amacapital.net> <alpine.DEB.2.21.1904071132120.1840@nanos.tec.linutronix.de>
To:     Thomas Gleixner <tglx@linutronix.de>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk


> On Apr 7, 2019, at 2:34 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
>=20
> On Sun, 7 Apr 2019, Andy Lutomirski wrote:
>>> On Apr 6, 2019, at 11:08 PM, Thomas Gleixner <tglx@linutronix.de> wrote:=

>>>=20
>>>>> On Sat, 6 Apr 2019, Andy Lutomirski wrote:
>>>>> On Fri, Apr 5, 2019 at 8:11 AM Thomas Gleixner <tglx@linutronix.de> wr=
ote:
>>>>>=20
>>>>> From: Andy Lutomirski <luto@kernel.org>
>>>>>=20
>>>>> The IRQ stack lives in percpu space, so an IRQ handler that overflows i=
t
>>>>> will overwrite other data structures.
>>>>>=20
>>>>> Use vmap() to remap the IRQ stack so that it will have the usual guard=

>>>>> pages that vmap/vmalloc allocations have. With this the kernel will pa=
nic
>>>>> immediately on an IRQ stack overflow.
>>>>=20
>>>> The 0day bot noticed that this dies with DEBUG_PAGEALLOC on.  This is
>>>> because the store_stackinfo() function is utter garbage and this patch
>>>> correctly detects just how broken it is.  The attached patch "fixes"
>>>> it.  (It also contains a reliability improvement that should probably
>>>> get folded in, but is otherwise unrelated.)
>>>>=20
>>>> A real fix would remove the generic kstack_end() function entirely
>>>> along with __HAVE_ARCH_KSTACK_END and would optionally replace
>>>> store_stackinfo() with something useful.  Josh, do we have a generic
>>>> API to do a little stack walk like this?  Otherwise, I don't think it
>>>> would be the end of the world to just remove the offending code.
>>>=20
>>> Yes, I found the same yesterday before heading out. It's already broken
>>> with the percpu stack because there is no guarantee that the per cpu sta=
ck
>>> is thread size aligned. It's guaranteed to be page aligned not more.
>>>=20
>>> I'm all for removing that nonsense, but the real question is whether the=
re
>>> is more code which assumes THREAD_SIZE aligned stacks aside of the threa=
d
>>> stack itself.
>>>=20
>>>=20
>> Well, any code like this is already busted, since the stacks alignment
>> doesn=E2=80=99t really change with these patches applied.
>=20
> It does. The existing code has it aligned by chance because the irq stack
> is the first entry in the per cpu area. But yes, there is no reason to req=
uire
> that alignment for irqstacks.
>=20

Isn=E2=80=99t it the first entry in the percpu area (the normal one, not cea=
)?  Is that aligned beyond PAGE_SIZE?=