Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp3303800yba; Mon, 8 Apr 2019 15:57:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqzEg9fcgWJc8EA1HsrqHmdGZaqnnXauvamKiRn6+rKlcAq0Y5wpqfRxX/CJlcinzpliCMqh X-Received: by 2002:a65:6545:: with SMTP id a5mr20229833pgw.264.1554764226221; Mon, 08 Apr 2019 15:57:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554764226; cv=none; d=google.com; s=arc-20160816; b=BbqfxFabJ5ATl1s0YmGSLXb3e42xCTwl9aE99iVbpM2K0VUIJp2pmoRLRks8rABD5L 7L2uRyRsflWbYJDUK8sKMFqWaY3Ibhh0Jm0c3LkP+fZMuGLcWepIVezf492lvR+4lvel bG+pCHBm3eU8ux4Qbz4iU8iWYAnkchGC5JkalDKi8Xocrg7KP9rPtES/9uMMCniGJXi4 t1vDJWN2REndazBTudmFJyyiorKMl4Pz4+6cpk56XIYvu81vJUmZxs9LaQYlVtSBi45p 8JiSkAuPmq3u8pzbyOhQjGD19ATGrByGTb0GgrCc3JikjnLIHkUfEeMY9j0Auw19OX57 G06Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date; bh=yUFkUCBtJVZoPREFeMaJYs2Oe3SysJS79+aIsKl10Tw=; b=VUtWJVrJeDhCqLv2QoWEYhHRXKmkVeA2jPOrhFhK9EP4Lx4ifw1pXlMY3bTzV5zvMD UqCiEwKPnq1CzlhW5ZVcCsSgFe57DpYz0wxELPjZ0Y0M3ilhMe6CbJLuw58+DSwM6kyR 3CbvBv9bsx8XCFGdyv2MXTtVoHSoWANRbd8PLAywFqQvAcj6F3fVLevElzDkHWMfNZr3 4jRxgVi3AMwzdI5qWwnP2OOLjPKp+2Y0++7Oknsz0/fRM27DF5qRZ/4bjRr5KD9y524c JiJfjluFsUodkM2rPnvX1gCbN4GmNL8ll8ozjv5QEnHEalzULjv96wLB4Yh8Ai5FIdJz 5Vrw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f14si1908618pgf.519.2019.04.08.15.56.51; Mon, 08 Apr 2019 15:57:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726756AbfDHWvQ (ORCPT + 99 others); Mon, 8 Apr 2019 18:51:16 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:43732 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726188AbfDHWvQ (ORCPT ); Mon, 8 Apr 2019 18:51:16 -0400 Received: from akpm3.svl.corp.google.com (unknown [104.133.8.65]) by mail.linuxfoundation.org (Postfix) with ESMTPSA id 6D308CBB; Mon, 8 Apr 2019 22:51:15 +0000 (UTC) Date: Mon, 8 Apr 2019 15:51:14 -0700 From: Andrew Morton To: Vadim Pasternak Cc: jacek.anaszewski@gmail.com, pavel@ucw.cz, linux-kernel@vger.kernel.org, linux-leds@vger.kernel.org, idosch@mellanox.com Subject: Re: [PATCH v1 bitops] bitops: Fix UBSAN undefined behavior warning for rotation right Message-Id: <20190408155114.c0031348812a0590662e4bf9@linux-foundation.org> In-Reply-To: <20190407125325.24440-1-vadimp@mellanox.com> References: <20190407125325.24440-1-vadimp@mellanox.com> X-Mailer: Sylpheed 3.7.0 (GTK+ 2.24.31; x86_64-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 7 Apr 2019 12:53:25 +0000 Vadim Pasternak wrote: > The warning is caused by call to rorXX(), if the second parameters of > this function "shift" is zero. In such case UBSAN reports the warning > for the next expression: (word << (XX - shift), where XX is > 64, 32, 16, 8 for respectively ror64, ror32, ror16, ror8. > Fix adds validation of this parameter - in case it's equal zero, no > need to rotate, just original "word" is to be returned to caller. > > The UBSAN undefined behavior warning has been reported for call to > ror32(): > [ 11.426543] UBSAN: Undefined behaviour in ./include/linux/bitops.h:93:33 > [ 11.434045] shift exponent 32 is too large for 32-bit type 'unsigned int' hm, do we care? > ... > > --- a/include/linux/bitops.h > +++ b/include/linux/bitops.h > @@ -70,6 +70,9 @@ static inline __u64 rol64(__u64 word, unsigned int shift) > */ > static inline __u64 ror64(__u64 word, unsigned int shift) > { > + if (!shift) > + return word; > + > return (word >> shift) | (word << (64 - shift)); > } Is there any known architecture or compiler for which UL<<64 doesn't reliably produce zero? Is there any prospect that this will become a problem in the future?