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[209.132.180.67]) by mx.google.com with ESMTP id 143si25818715pga.118.2019.04.11.03.34.52; Thu, 11 Apr 2019 03:35:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726677AbfDKKdy (ORCPT + 99 others); Thu, 11 Apr 2019 06:33:54 -0400 Received: from foss.arm.com ([217.140.101.70]:39872 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726026AbfDKKdy (ORCPT ); Thu, 11 Apr 2019 06:33:54 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BA54374; Thu, 11 Apr 2019 03:33:53 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F08613F59C; Thu, 11 Apr 2019 03:33:51 -0700 (PDT) From: Sudeep Holla To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Sudeep Holla , Aaro Koskinen , Aaro Koskinen , Florian Fainelli , Michal Simek , Mark Rutland , Lorenzo Pieralisi Subject: [RESEND][PATCH v2] firmware/psci: add support for SYSTEM_RESET2 Date: Thu, 11 Apr 2019 11:33:46 +0100 Message-Id: <20190411103346.22462-1-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PSCI v1.1 introduced SYSTEM_RESET2 to allow both architectural resets where the semantics are described by the PSCI specification itself as well as vendor-specific resets. Currently only system warm reset semantics is defined as part of architectural resets by the specification. This patch implements support for SYSTEM_RESET2 by making using of reboot_mode passed by the reboot infrastructure in the kernel. Cc: Mark Rutland Cc: Lorenzo Pieralisi Signed-off-by: Sudeep Holla --- drivers/firmware/psci.c | 21 +++++++++++++++++++++ include/uapi/linux/psci.h | 2 ++ 2 files changed, 23 insertions(+) Resending [1] based on the request. I hope to get some testing this time. Last time Xilinx asked multiple times but never got any review or testing https://lore.kernel.org/lkml/1525257003-8608-1-git-send-email-sudeep.holla@arm.com/ diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index c80ec1d03274..91748725534e 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -88,6 +88,7 @@ static u32 psci_function_id[PSCI_FN_MAX]; PSCI_1_0_EXT_POWER_STATE_TYPE_MASK) static u32 psci_cpu_suspend_feature; +static bool psci_system_reset2_supported; static inline bool psci_has_ext_power_state(void) { @@ -253,6 +254,15 @@ static int get_set_conduit_method(struct device_node *np) static void psci_sys_reset(enum reboot_mode reboot_mode, const char *cmd) { + if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) && + psci_system_reset2_supported) + /* + * reset_type[31] = 0 (architectural) + * reset_type[30:0] = 0 (SYSTEM_WARM_RESET) + * cookie = 0 (ignored by the implementation) + */ + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), 0, 0, 0); + invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); } @@ -451,6 +461,16 @@ static const struct platform_suspend_ops psci_suspend_ops = { .enter = psci_system_suspend_enter, }; +static void __init psci_init_system_reset2(void) +{ + int ret; + + ret = psci_features(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2)); + + if (ret != PSCI_RET_NOT_SUPPORTED) + psci_system_reset2_supported = true; +} + static void __init psci_init_system_suspend(void) { int ret; @@ -588,6 +608,7 @@ static int __init psci_probe(void) psci_init_smccc(); psci_init_cpu_suspend(); psci_init_system_suspend(); + psci_init_system_reset2(); } return 0; diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h index b3bcabe380da..5b0ba0062541 100644 --- a/include/uapi/linux/psci.h +++ b/include/uapi/linux/psci.h @@ -49,8 +49,10 @@ #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) +#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) +#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff -- 2.17.1