Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Jose Abreu <jose.abreu@synopsys.com>
To:     "Leonidas P. Papadakos" <papadakospan@gmail.com>,
        Robin Murphy <robin.murphy@arm.com>
CC:     Jose Abreu <jose.abreu@synopsys.com>,
        Philipp Tomsich <philipp.tomsich@theobroma-systems.com>,
        =?iso-8859-1?Q?Heiko_St=FCbner?= <heiko@sntech.de>,
        =?iso-8859-1?Q?Christoph_M=FCllner?= 
        <christoph.muellner@theobroma-systems.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Alexandre Torgue <alexandre.torgue@st.com>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        Klaus Goger <klaus.goger@theobroma-systems.com>
Subject: RE: [PATCH 1/2] stmmac: introduce flag to dynamically disable TX
 offload for rockchip devices
Thread-Topic: [PATCH 1/2] stmmac: introduce flag to dynamically disable TX
 offload for rockchip devices
Thread-Index: AQHU6Ld2BNOIyyJamEeC//pMtZni+6YnhciAgAADZICAAAGHgIAA920AgAAfNACAACI8cIAAipiAgAALMwCAALjx8IAAYG+AgAAFvgCAAASDgIAC4/OwgABi2ACAAAQmgIAAAsSAgAmYDQCAAM6qYA==
Date:   Fri, 12 Apr 2019 07:35:05 +0000
Message-ID: <78EB27739596EE489E55E81C33FEC33A0B4566A9@DE02WEMBXB.internal.synopsys.com>
References: <20190401181840.31255-1-papadakospan@gmail.com>
        <9d65a22a-2288-dc53-0059-ec4a31424dd8@arm.com> <2312344.mOsv7YkeBG@diego>
        <9EC67532-2D43-4AAD-BFA7-8B6797067427@theobroma-systems.com>
        <78EB27739596EE489E55E81C33FEC33A0B421348@de02wembxa.internal.synopsys.com>
        <4a9839d6-3d90-4354-7b64-78d5c1126e99@arm.com>
        <78EB27739596EE489E55E81C33FEC33A0B423811@de02wembxa.internal.synopsys.com>
        <c45d05f1-47b0-89d5-886d-d456d0111b7a@arm.com> <1554245296.1271.0@gmail.com>
        <78EB27739596EE489E55E81C33FEC33A0B4254A0@de02wembxa.internal.synopsys.com>
        <1554305721.1328.0@gmail.com> <1554306954.1328.1@gmail.com>
        <c863f88a-65e2-4093-7cc1-f37e4443b871@arm.com>
        <78EB27739596EE489E55E81C33FEC33A0B44985F@DE02WEMBXB.internal.synopsys.com>
        <1554488052.1193.1@gmail.com> <85c1d945-d49b-3350-6ff4-a058c5a8c1d7@arm.com>
        <1554489537.1199.0@gmail.com> <1555016970.28872.0@gmail.com>
In-Reply-To: <1555016970.28872.0@gmail.com>
Accept-Language: en-US
Content-Language: en-US
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

From: Leonidas P. Papadakos <papadakospan@gmail.com>
Date: Thu, Apr 11, 2019 at 22:09:30

>=20
> At this point I've settled on snps,txpbl =3D <0x20> by itself.
> If I increase the MTU from the default of 1500 I get a stack trace and=20
> link reset almost immediately:
> (https://urldefense.proofpoint.com/v2/url?u=3Dhttps-3A__pastebin.com_raw_=
5JBtfWei&d=3DDwIBAg&c=3DDPL6_X_6JkXFx7AXWqB0tg&r=3DWHDsc6kcWAl4i96Vm5hJ_19I=
Jiuxx_p_Rzo2g-uHDKw&m=3D4VBEjla4XZR8-m8v84wV5TnhbHyIvTniApjuk2XMoS8&s=3DpiZ=
9ECO216D0lthteXLpCiOvlHwJhq-x_pBKChT274Y&e=3D)
> whether TX Checksumming is ON or OFF.

Can you please share the stacktrace here ? I can't access pastebin due to=20
corporate policy.

If it's a queue timeout then please share your "dmesg | grep -i stmmac"=20
since boot.

>=20
> That said, with the default MTU, I get better speeds when TX=20
> Checksumming is on and the PBL tweak is set.
>=20
> Is there a better option in the horizon for the near future?
> At least for the Renegade (the only board I have to test) it can serve=20
> as a temporary workaround.
> Should I make a patch to replace force_thresh_dma_mode with txbpl=20
> <0x20> for the Renegade specifically?
>=20
> In any case I would be happy to help as much as I can to figure out if=20
> it's a board specific thing, or SoC, or even an issue of the Ethernet=20
> device itself.

This is not a workaround neither an issue. It's well stablished that PBL=20
setting interferes with COE so one must choose a setting that depends on=20
FIFO size. I would like to make it automatic in the driver but I didn't=20
have the time to submit a patch yet, sorry.

Thanks,
Jose Miguel Abreu