Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp2264869yba; Mon, 15 Apr 2019 08:12:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqx/kdbgCK0W41/b/EBj2nwTy+lHDY/ClWCUu/htg0HyR3hmL9gEyjfVp/c1BwWHxOKnz6n8 X-Received: by 2002:a17:902:e110:: with SMTP id cc16mr76478304plb.147.1555341166245; Mon, 15 Apr 2019 08:12:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555341166; cv=none; d=google.com; s=arc-20160816; b=SyWoT1Izz+YLeymeDYct9MPdCGxn1aYTpBMLjmrplPAa7XhZwrWskTgXHmlfbE8Vzr fdvD8+7Kpe2u02CvB7FoRGR65DzGkGcniS+TTLkyN4S97mSHPLyMYiGJMc6inqDWGiX2 9AUe5ZiPRWyW4ItVAXNfAdtqp7+NVdSFXU+C1CpwWsE/UeaL6mRPdulIAv7afJ+1EFzN QYMZAkveYSpU/am5E+qpmoKIJSQV+27OPr7ZSJt2aLlam2VnceA4wF1dQ956ut4suKej lnk6GZuHdTuZI3d23+Kktbutfxx/cT5M9MPbJRbe7wBq74OhPGx88GY/b3RtS6PWK6K9 ly0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=I17cFviHwxFiqiY+JxDpWyQKsGaOF8OMNtyW3y9mBXU=; b=J24MHuEM0l+RxF2uYd6pfGCcGG77NTEOwmAYSlydP5BkaojiQcpWuAraxEYP+QGRvV NHE82aOftM+8ShIimXHsDmpbLNNogBZ1CBKXAOpiSOasxMaZHdereGNEVwia9QZU8KOW JL1JrP2qX85pPObWqf+XhmCsy8R5Fq2p/UlyZrHflMw0tirj0jMv6N5C7MGfSzWwZdmf siKaXxyd5UvQafyCJMt8XNr435u4polgyLZZFWpkf3+rbjSeg3KXzKjNh2OHwbciBYHF L99jtKMuEC2aJxlC10Qona5LAcCxjAiMzzFg7vAAQFhiejx87bQquEoFHpZbh52LjqWk xYSA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r5si43258816pgp.29.2019.04.15.08.12.29; Mon, 15 Apr 2019 08:12:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727717AbfDOPJv (ORCPT + 99 others); Mon, 15 Apr 2019 11:09:51 -0400 Received: from relay9-d.mail.gandi.net ([217.70.183.199]:47357 "EHLO relay9-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727648AbfDOPJS (ORCPT ); Mon, 15 Apr 2019 11:09:18 -0400 X-Originating-IP: 109.212.207.226 Received: from localhost (alyon-652-1-176-226.w109-212.abo.wanadoo.fr [109.212.207.226]) (Authenticated sender: alexandre.belloni@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 745C3FF804; Mon, 15 Apr 2019 15:09:15 +0000 (UTC) From: Alexandre Belloni To: Daniel Lezcano Cc: Thomas Gleixner , Nicolas Ferre , Alexander Dahl , Sebastian Andrzej Siewior , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexandre Belloni Subject: [PATCH v2 4/9] ARM: at91: Implement clocksource selection Date: Mon, 15 Apr 2019 17:08:51 +0200 Message-Id: <20190415150856.9384-5-alexandre.belloni@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190415150856.9384-1-alexandre.belloni@bootlin.com> References: <20190415150856.9384-1-alexandre.belloni@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allow selecting and unselecting the PIT clocksource driver so it doesn't have to be compiled when unused. Signed-off-by: Alexandre Belloni --- arch/arm/mach-at91/Kconfig | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 903f23c309df..da1d97a06c53 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -107,6 +107,29 @@ config SOC_AT91SAM9 AT91SAM9X35 AT91SAM9XE +comment "Clocksource driver selection" + +config ATMEL_CLOCKSOURCE_PIT + bool "Periodic Interval Timer (PIT) support" + depends on SOC_AT91SAM9 || SOC_SAMA5 + default SOC_AT91SAM9 || SOC_SAMA5 + select ATMEL_PIT + help + Select this to get a clocksource based on the Atmel Periodic Interval + Timer. It has a relatively low resolution and the TC Block clocksource + should be preferred. + +config ATMEL_CLOCKSOURCE_TCB + bool "Timer Counter Blocks (TCB) support" + default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5 + select ATMEL_TCB_CLKSRC + help + Select this to get a high precision clocksource based on a + TC block with a 5+ MHz base clock rate. + On platforms with 16-bit counters, two timer channels are combined + to make a single 32-bit timer. + It can also be used as a clock event device supporting oneshot mode. + config HAVE_AT91_UTMI bool -- 2.20.1