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[209.132.180.67]) by mx.google.com with ESMTP id y13si37850778pgf.252.2019.04.15.14.32.56; Mon, 15 Apr 2019 14:33:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=HSB3T242; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728250AbfDOVax (ORCPT + 99 others); Mon, 15 Apr 2019 17:30:53 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16525 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728199AbfDOVau (ORCPT ); Mon, 15 Apr 2019 17:30:50 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 15 Apr 2019 14:30:54 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 15 Apr 2019 14:30:49 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 15 Apr 2019 14:30:49 -0700 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 15 Apr 2019 21:30:49 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 15 Apr 2019 21:30:49 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.167.253]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Mon, 15 Apr 2019 14:30:48 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , Subject: [PATCH V3 3/9] spi: add SPI_LSBYTE_FIRST mode Date: Mon, 15 Apr 2019 14:30:28 -0700 Message-ID: <1555363834-32155-4-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1555363834-32155-1-git-send-email-skomatineni@nvidia.com> References: <1555363834-32155-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1555363854; bh=PA+MUP4wtIjTbicCMD+SI9ZPZygFzrJAP89JsXk9240=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=HSB3T242lt8CnIDGANDbLJYJPFMnZKRD3ZkK8ato4ckUZM442od6lR27mtg2z/mm3 Ag36IM9YeHQYEaemfTCaZKbTM3bkN0IAFZdo4ETb2HsedDVUMGYNdiSBFZTYoSPVh2 o0gWvIt1qovIvvsNnTilculcqq1UdpqBFFuttNKSrQabL+8yV98QZC3+K3L2e0uWHD PkcINDuWxQnvvXI9hwX9mGQjeNwRjqDipYC7qlpFENkPn+wWOp71GsGdBwW44Jjot8 MQf7MA48Diu3YBfOcXt4GQRMcHgqfdEr9HGn6kr8BzMMEnvsSggNpHF1Ltuj7bOWzE 7k63bkffSHNCA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some SPI slaves expect bytes to be in least significant first order and some expects most significant first oder. This patch adds support for requesting SPI master controllers for least significant first order using SPI_LSBYTE_FIRST mode. Signed-off-by: Sowjanya Komatineni --- drivers/spi/spi.c | 18 ++++++++++-------- include/linux/spi/spi.h | 1 + 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index bf4027b54a19..59b1e57cae74 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2982,14 +2982,16 @@ int spi_setup(struct spi_device *spi) spi_set_cs(spi, false); - dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n", - (int) (spi->mode & (SPI_CPOL | SPI_CPHA)), - (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "", - (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "", - (spi->mode & SPI_3WIRE) ? "3wire, " : "", - (spi->mode & SPI_LOOP) ? "loopback, " : "", - spi->bits_per_word, spi->max_speed_hz, - status); + dev_dbg(&spi->dev, + "setup mode %d, %s%s%s%s%s%u bits/w, %u Hz max --> %d\n", + (int) (spi->mode & (SPI_CPOL | SPI_CPHA)), + (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "", + (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "", + (spi->mode & SPI_LSBYTE_FIRST) ? "lsbyte, " : "", + (spi->mode & SPI_3WIRE) ? "3wire, " : "", + (spi->mode & SPI_LOOP) ? "loopback, " : "", + spi->bits_per_word, spi->max_speed_hz, + status); return status; } diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 053abd22ad31..fc4d21b4c2e4 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -164,6 +164,7 @@ struct spi_device { #define SPI_TX_OCTAL 0x2000 /* transmit with 8 wires */ #define SPI_RX_OCTAL 0x4000 /* receive with 8 wires */ #define SPI_3WIRE_HIZ 0x8000 /* high impedance turnaround */ +#define SPI_LSBYTE_FIRST 0x10000 /* per-word bytes-on-wire */ int irq; void *controller_state; void *controller_data; -- 2.7.4