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[209.132.180.67]) by mx.google.com with ESMTP id z123si45003470pgb.199.2019.04.16.08.22.30; Tue, 16 Apr 2019 08:22:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729741AbfDPPVQ (ORCPT + 99 others); Tue, 16 Apr 2019 11:21:16 -0400 Received: from foss.arm.com ([217.140.101.70]:57748 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726751AbfDPPVQ (ORCPT ); Tue, 16 Apr 2019 11:21:16 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E195615A2; Tue, 16 Apr 2019 08:21:15 -0700 (PDT) Received: from fuggles.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4233A3F59C; Tue, 16 Apr 2019 08:21:14 -0700 (PDT) Date: Tue, 16 Apr 2019 16:21:11 +0100 From: Will Deacon To: Rasmus Villemoes Cc: Andrew Morton , Vineet Gupta , Anthony Yznaga , Andrey Ryabinin , Pavel Machek , Ido Schimmel , Vadim Pasternak , linux-kernel@vger.kernel.org Subject: Re: [PATCH] bitops.h: sanitize rotate primitives Message-ID: <20190416152111.GC4187@fuggles.cambridge.arm.com> References: <20190410211906.2190-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190410211906.2190-1-linux@rasmusvillemoes.dk> User-Agent: Mutt/1.11.1+86 (6f28e57d73f2) () Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 10, 2019 at 11:19:06PM +0200, Rasmus Villemoes wrote: > The ror32 implementation (word >> shift) | (word << (32 - shift) has > undefined behaviour if shift is outside the [1, 31] range. Similarly > for the 64 bit variants. Most callers pass a compile-time > constant (naturally in that range), but there's an UBSAN report that > these may actually be called with a shift count of 0. > > Instead of special-casing that, we can make them DTRT for all values > of shift while also avoiding UB. For some reason, this was already > partly done for rol32 (which was well-defined for [0, 31]). gcc 8 > recognizes these patterns as rotates, so for example > > __u32 rol32(__u32 word, unsigned int shift) > { > return (word << (shift & 31)) | (word >> ((-shift) & 31)); > } > > compiles to > > 0000000000000020 : > 20: 89 f8 mov %edi,%eax > 22: 89 f1 mov %esi,%ecx > 24: d3 c0 rol %cl,%eax > 26: c3 retq > > Older compilers unfortunately do not do as well, but this only affects > the small minority of users that don't pass constants. > > Due to integer promotions, ro[lr]8 were already well-defined for > shifts in [0, 8], and ro[lr]16 were mostly well-defined for shifts in > [0, 16] (only mostly - u16 gets promoted to _signed_ int, so if bit 15 > is set, word << 16 is undefined). For consistency, update those as > well. > > Reported-by: Ido Schimmel > Cc: Vadim Pasternak > Signed-off-by: Rasmus Villemoes > --- > include/linux/bitops.h | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) Reviewed-by: Will Deacon I guess it would be possible to roll some of this up into macros using sizeof, but perhaps that would make things even more difficult for the compiler. Will