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[209.132.180.67]) by mx.google.com with ESMTP id f9si1953566pgv.475.2019.04.17.06.10.35; Wed, 17 Apr 2019 06:10:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732123AbfDQNIV (ORCPT + 99 others); Wed, 17 Apr 2019 09:08:21 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:44536 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727034AbfDQNIU (ORCPT ); Wed, 17 Apr 2019 09:08:20 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 256AB374; Wed, 17 Apr 2019 06:08:20 -0700 (PDT) Received: from [10.162.0.144] (a075553-lin.blr.arm.com [10.162.0.144]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6279E3F59C; Wed, 17 Apr 2019 06:08:16 -0700 (PDT) Subject: Re: [PATCH v9 1/5] KVM: arm64: Add a vcpu flag to control ptrauth for guest To: Marc Zyngier , linux-arm-kernel@lists.infradead.org Cc: Christoffer Dall , Catalin Marinas , Will Deacon , Andrew Jones , Dave Martin , Ramana Radhakrishnan , kvmarm@lists.cs.columbia.edu, Kristina Martsenko , linux-kernel@vger.kernel.org, Mark Rutland , James Morse , Julien Thierry References: <1555039236-10608-1-git-send-email-amit.kachhap@arm.com> <1555039236-10608-2-git-send-email-amit.kachhap@arm.com> From: Amit Daniel Kachhap Message-ID: Date: Wed, 17 Apr 2019 18:38:13 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 4/17/19 2:05 PM, Marc Zyngier wrote: > On 12/04/2019 04:20, Amit Daniel Kachhap wrote: >> A per vcpu flag is added to check if pointer authentication is >> enabled for the vcpu or not. This flag may be enabled according to >> the necessary user policies and host capabilities. >> >> This patch also adds a helper to check the flag. >> >> Signed-off-by: Amit Daniel Kachhap >> Cc: Mark Rutland >> Cc: Marc Zyngier >> Cc: Christoffer Dall >> Cc: kvmarm@lists.cs.columbia.edu >> --- >> >> Changes since v8: >> * Added a new per vcpu flag which will store Pointer Authentication enable >> status instead of checking them again. [Dave Martin] >> >> arch/arm64/include/asm/kvm_host.h | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h >> index 9d57cf8..31dbc7c 100644 >> --- a/arch/arm64/include/asm/kvm_host.h >> +++ b/arch/arm64/include/asm/kvm_host.h >> @@ -355,10 +355,14 @@ struct kvm_vcpu_arch { >> #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */ >> #define KVM_ARM64_GUEST_HAS_SVE (1 << 5) /* SVE exposed to guest */ >> #define KVM_ARM64_VCPU_SVE_FINALIZED (1 << 6) /* SVE config completed */ >> +#define KVM_ARM64_GUEST_HAS_PTRAUTH (1 << 7) /* PTRAUTH exposed to guest */ >> >> #define vcpu_has_sve(vcpu) (system_supports_sve() && \ >> ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE)) >> >> +#define vcpu_has_ptrauth(vcpu) \ >> + ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH) >> + > > Just as for SVE, please first check that the system has PTRAUTH. > Something like: > > (cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_ARCH) && \ > ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH)) In the subsequent patches, vcpu->arch.flags is only set to KVM_ARM64_GUEST_HAS_PTRAUTH when all host capability check conditions matches such as system_supports_address_auth(), system_supports_generic_auth() so doing them again is repetitive in my view. Thanks, Amit D > > This will save an extra load on unsuspecting CPUs thanks to the static > key embedded in the capability structure. > > Thanks, > > M. >