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[209.132.180.67]) by mx.google.com with ESMTP id q81si1764044pfa.207.2019.04.18.02.39.56; Thu, 18 Apr 2019 02:40:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=nUVCG1aV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388547AbfDRJiP (ORCPT + 99 others); Thu, 18 Apr 2019 05:38:15 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:41754 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388044AbfDRJiP (ORCPT ); Thu, 18 Apr 2019 05:38:15 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3I9bQ0V020970; Thu, 18 Apr 2019 11:37:59 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=BPJ+N6NDIIjJr9urBH6gpc6kArkwZmspGvlv57qoUFo=; b=nUVCG1aVWZH6JBBiUFU5ZW17gptVuWn4Rk/VaZVWo0zDaSwgi8WAF0HGvrWFKcbv/F/m BPFFeBm4/24os21QOy3Ge5dJpyVYXvE+u8IEV6cvqn0ZZzX3EdI1pOs+HYk+mTeEO0x3 0Y++6dfbBSITHuGc4Y0s4eDO9YtrvRUff4YkbuOgeZ9nn2MwAFuosyhqgKavEZwi+jxL ydFoIvB//6bU8+r7SxVIEdbvWkbhanwYgEgXyPsV374b0/x6A/BOBrFmY76PD+j5PeCW NKsFf+BFm53UeDaMW1O1WNXZnpVU43CICJLWdLSCjusMCKiAouiAhLM+ZDhbVCVDf1kt zQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2ru6nh4ycm-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 18 Apr 2019 11:37:59 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9D61C34; Thu, 18 Apr 2019 09:37:58 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 73E33159F; Thu, 18 Apr 2019 09:37:58 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 18 Apr 2019 11:37:58 +0200 From: Fabrice Gasnier To: CC: , , , , , , , , , , , Subject: [RESEND PATCH v5 2/3] pwm: stm32-lp: Add power management support Date: Thu, 18 Apr 2019 11:37:46 +0200 Message-ID: <1555580267-29299-3-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1555580267-29299-1-git-send-email-fabrice.gasnier@st.com> References: <1555580267-29299-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG8NODE2.st.com (10.75.127.23) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-04-18_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add suspend/resume PM sleep ops. When going to low power, enforce the PWM channel isn't active. Let the PWM consumers disable it during their own suspend sequence. Only perform a check here, and handle the pinctrl states. See [1]. [1] https://lkml.org/lkml/2019/2/5/770 Signed-off-by: Fabrice Gasnier --- Changes in v2: - Don't disable PWM channel: let the PWM user disable it. Refuse to suspend in case it's been left enabled. - Drop the ifdefs, use __maybe_unused instead. --- drivers/pwm/pwm-stm32-lp.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 0059b24c..2211a64 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -223,6 +224,29 @@ static int stm32_pwm_lp_remove(struct platform_device *pdev) return pwmchip_remove(&priv->chip); } +static int __maybe_unused stm32_pwm_lp_suspend(struct device *dev) +{ + struct stm32_pwm_lp *priv = dev_get_drvdata(dev); + struct pwm_state state; + + pwm_get_state(&priv->chip.pwms[0], &state); + if (state.enabled) { + dev_err(dev, "The consumer didn't stop us (%s)\n", + priv->chip.pwms[0].label); + return -EBUSY; + } + + return pinctrl_pm_select_sleep_state(dev); +} + +static int __maybe_unused stm32_pwm_lp_resume(struct device *dev) +{ + return pinctrl_pm_select_default_state(dev); +} + +static SIMPLE_DEV_PM_OPS(stm32_pwm_lp_pm_ops, stm32_pwm_lp_suspend, + stm32_pwm_lp_resume); + static const struct of_device_id stm32_pwm_lp_of_match[] = { { .compatible = "st,stm32-pwm-lp", }, {}, @@ -235,6 +259,7 @@ static struct platform_driver stm32_pwm_lp_driver = { .driver = { .name = "stm32-pwm-lp", .of_match_table = of_match_ptr(stm32_pwm_lp_of_match), + .pm = &stm32_pwm_lp_pm_ops, }, }; module_platform_driver(stm32_pwm_lp_driver); -- 2.7.4