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[209.132.180.67]) by mx.google.com with ESMTP id b41si1809579pla.241.2019.04.18.04.22.10; Thu, 18 Apr 2019 04:22:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388776AbfDRLUy (ORCPT + 99 others); Thu, 18 Apr 2019 07:20:54 -0400 Received: from relay10.mail.gandi.net ([217.70.178.230]:55607 "EHLO relay10.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727807AbfDRLUy (ORCPT ); Thu, 18 Apr 2019 07:20:54 -0400 Received: from localhost (aaubervilliers-681-1-42-238.w90-88.abo.wanadoo.fr [90.88.160.238]) (Authenticated sender: maxime.ripard@bootlin.com) by relay10.mail.gandi.net (Postfix) with ESMTPSA id E04A9240005; Thu, 18 Apr 2019 11:20:49 +0000 (UTC) Date: Thu, 18 Apr 2019 13:20:49 +0200 From: Maxime Ripard To: Jagan Teki Cc: Chen-Yu Tsai , Rob Herring , Mark Rutland , Michael Trimarchi , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com Subject: Re: [PATCH 1/2] arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1 Message-ID: <20190418112049.mgvvvcwzf3ezg4pw@flea> References: <20190418083813.11776-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="awtgps4p5ffdljja" Content-Disposition: inline In-Reply-To: <20190418083813.11776-1-jagan@amarulasolutions.com> User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --awtgps4p5ffdljja Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Apr 18, 2019 at 02:08:12PM +0530, Jagan Teki wrote: > Some camera modules have the SoC feeding a master clock to the sensor > instead of having a standalone crystal. This clock signal is generated > from the clock control unit and output from the CSI MCLK function of > pin PE1. > > Add a pinmux setting for it for camera sensors to reference. > > Signed-off-by: Jagan Teki > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index 6f27eb082429..6f4e00ec9c68 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -597,6 +597,11 @@ > function = "csi"; > }; > > + csi_mclk_pin: csi-mclk { The name of the pin should be ending with -pin, and please add /omit-if-no-ref/ Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --awtgps4p5ffdljja Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXLhdkQAKCRDj7w1vZxhR xX0SAP91Z9NPv6I8QWcHV4ella9gF/FwxKlQf6i3TvT72y91GQEAvpMhVn1S6zhZ 2Z1ZlvmSuZLeJ9UuOwCmu7ndJU/rQwA= =YFn5 -----END PGP SIGNATURE----- --awtgps4p5ffdljja--