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[209.132.180.67]) by mx.google.com with ESMTP id v25si7627690pfe.22.2019.04.20.03.15.01; Sat, 20 Apr 2019 03:15:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="pwM5+oP/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728334AbfDTKLz (ORCPT + 99 others); Sat, 20 Apr 2019 06:11:55 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:59446 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728299AbfDTKLx (ORCPT ); Sat, 20 Apr 2019 06:11:53 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x3KABQ0k081050; Sat, 20 Apr 2019 05:11:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1555755086; bh=7WkFttLUE9yHAX8/PBeYAQMX4niU3afKzDeIbACd41M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pwM5+oP/irVUN10BQ49EaIhpy4fPIDRF0FCB8Ra0nnOO27tA3BOFrHE/PKrOUnlWY AQfX8YQkOxJa+FWTZtmKNLECBniik5qd5aIYsz7Efw4XACqnfYDbYADhsyF36pbVmw FPXi2x6fI7fvsRevVgS1OMcL3aaz3QDQN1LOgeJc= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x3KABQpg029470 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 20 Apr 2019 05:11:26 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Sat, 20 Apr 2019 05:11:25 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Sat, 20 Apr 2019 05:11:25 -0500 Received: from uda0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x3KAAHa5070234; Sat, 20 Apr 2019 05:11:21 -0500 From: Lokesh Vutla To: Marc Zyngier , Santosh Shilimkar , Rob Herring , Nishanth Menon , , CC: Linux ARM Mailing List , , Tero Kristo , Sekhar Nori , Tony Lindgren , , Peter Ujfalusi , Grygorii Strashko , Lokesh Vutla , Device Tree Mailing List , Marc Zyngier Subject: [PATCH v7 14/14] arm64: arch_k3: Enable interrupt controller drivers Date: Sat, 20 Apr 2019 15:39:50 +0530 Message-ID: <20190420100950.7997-15-lokeshvutla@ti.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190420100950.7997-1-lokeshvutla@ti.com> References: <20190420100950.7997-1-lokeshvutla@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Select the TISCI Interrupt Router, Aggregator drivers and all its dependencies for TI's SoCs based on K3 architecture. Suggested-by: Marc Zyngier Signed-off-by: Lokesh Vutla --- Changes since v6: - Moved the selection to ARCH_K3 arch/arm64/Kconfig.platforms | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index b5ca9c50876d..ab9cac8235b3 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -82,6 +82,11 @@ config ARCH_EXYNOS config ARCH_K3 bool "Texas Instruments Inc. K3 multicore SoC architecture" select PM_GENERIC_DOMAINS if PM + select MAILBOX + select TI_MESSAGE_MANAGER + select TI_SCI_PROTOCOL + select TI_SCI_INTR_IRQCHIP + select TI_SCI_INTA_IRQCHIP help This enables support for Texas Instruments' K3 multicore SoC architecture. -- 2.21.0