From: Stuart Young <cef-lkml@optusnet.com.au>
To: linux-kernel@vger.kernel.org
Subject: Re: flush cache range proposal (was Re: ide errors in 7-rc1-mm1 and later)
Date: Fri, 11 Jun 2004 16:10:34 +1000
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Cc: Jeff Garzik <jgarzik@pobox.com>,
       "Eric D. Mudama" <edmudama@mail.bounceswoosh.org>,
       Jens Axboe <axboe@suse.de>,
       Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>,
       Ed Tomlinson <edt@aei.ca>, Andrew Morton <akpm@osdl.org>
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On Fri, 11 Jun 2004 03:50, Jeff Garzik wrote:

> 2) IDENTIFY DEVICE, Word 207, Command set/feature enabled
>
> bit 15:		shall be cleared to zero
> bit 14:		shall be set to one
> bits 13:1:	reserved
> bits 0:		1 == flush cache (range) enabled
>
> Word 206:
>
> If bit 0 is set to one, the mandatory FLUSH CACHE and FLUSH CACHE EXT
> commands (if implemented) support the RANGE bit, and user-supplied LBA
> and sector count specifying the limits of the cache flush.

Shouldn't that be "Word 207:" up there?

-- 
 Stuart Young (aka Cef)
 cef-lkml@optusnet.com.au is for LKML and related email only
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