Date: Fri, 18 Jun 2004 19:19:58 +0100
From: Ian Molton <spyro@f2s.com>
To: Matt Porter <mporter@kernel.crashing.org>
Cc: linux-kernel@vger.kernel.org, greg@kroah.com, tony@atomide.com,
       david-b@pacbell.net, jamey.hicks@hp.com, joshua@joshuawise.com
Subject: Re: DMA API issues
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In-Reply-To: <20040618110721.B3851@home.com>
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	<20040618110721.B3851@home.com>
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On Fri, 18 Jun 2004 11:07:21 -0700
Matt Porter <mporter@kernel.crashing.org> wrote:

> Can't you just implement an arch-specific allocator for your 32KB
> SRAM, then implement the DMA API streaming and dma_alloc/free APIs
> on top of that?

Yes but thats not very generic is it? Im not the only one with this
problem.

>  Since this architecture is obviously not designed
> for performance

What makes you think writes to the 32K SRAM are any slower than to the
SDRAM? the device is completely memory mapped.

>, it doesn't seem to be a big deal to have the streaming
> APIs copy to/from the kmalloced (or whatever) buffer to/from the SRAM
> allocated memory and then have those APIs return the proper dma_addr_t
> for the embedded OHCI's address space view of the SRAM.

Again its a suboptimal solution, and on an architecture where the CPU
isnt *that* fast in the first place it seems wrong to deliberately
choose the slowest possible route...
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