Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S265790AbUFWQSr (ORCPT ); Wed, 23 Jun 2004 12:18:47 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S265786AbUFWQSr (ORCPT ); Wed, 23 Jun 2004 12:18:47 -0400 Received: from caramon.arm.linux.org.uk ([212.18.232.186]:57348 "EHLO caramon.arm.linux.org.uk") by vger.kernel.org with ESMTP id S266372AbUFWQKn (ORCPT ); Wed, 23 Jun 2004 12:10:43 -0400 Date: Wed, 23 Jun 2004 17:10:33 +0100 From: Russell King To: Takashi Iwai Cc: Linus Torvalds , Jeff Garzik , Matt Porter , Jamey Hicks , Ian Molton , linux-kernel@vger.kernel.org, greg@kroah.com, tony@atomide.com, david-b@pacbell.net, joshua@joshuawise.com Subject: Re: DMA API issues Message-ID: <20040623171033.F27549@flint.arm.linux.org.uk> Mail-Followup-To: Takashi Iwai , Linus Torvalds , Jeff Garzik , Matt Porter , Jamey Hicks , Ian Molton , linux-kernel@vger.kernel.org, greg@kroah.com, tony@atomide.com, david-b@pacbell.net, joshua@joshuawise.com References: <20040622000838.B7802@flint.arm.linux.org.uk> <40D7941F.3020909@pobox.com> <20040623133423.B27549@flint.arm.linux.org.uk> <20040623164419.E27549@flint.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from tiwai@suse.de on Wed, Jun 23, 2004 at 06:01:04PM +0200 Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1880 Lines: 41 On Wed, Jun 23, 2004 at 06:01:04PM +0200, Takashi Iwai wrote: > At Wed, 23 Jun 2004 16:44:19 +0100, > Russell King wrote: > > > > On Wed, Jun 23, 2004 at 05:36:57PM +0200, Takashi Iwai wrote: > > > > and a similar one for the ARM-specific "write combining" case (for > > > > framebuffers utilising the DMA API)? > > > > > > pgprot_noncached() is used on many other architectures in fbmem.c > > > (well, not really, but the result is identical). > > > Should it be provided as another one, or is it used as default in > > > dma_mmap_coherent()? > > > > The whole point is to kill the idea that drivers should have to know > > about page protection crap. That should be wholely contained within > > the architecture implementation. > > I agree. My question is whether we need to handle different cases > with cached, non-cached and writecombine, according to the demand of > the driver. In other words, do we always handle these mmap pages to > be non-cached (except for writecombine version)? No - the driver should have _zero_ visibility of this. The only time the cache property comes in is where the architecture needs to alter these properties to achieve the requirements of the interface - IOW to provide user space with a DMA-coherent mapping. Remember that some architectures are unable to disable caching on a page by page basis, yet may be able to offer fully-cached DMA coherent mmaps, and therefore such driver interference is wrong. -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: 2.6 PCMCIA - http://pcmcia.arm.linux.org.uk/ 2.6 Serial core - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/