Subject: Re: [PATCH] Fix for spurious interrupts on e100 resume
From: Jeremy Fitzhardinge <jeremy@goop.org>
To: Nathan Bryant <nbryant@optonline.net>
Cc: john.ronciak@intel.com, ganesh.venkatesan@intel.com,
       scott.feldman@intel.com, Andrew Morton <akpm@osdl.org>,
       linux-kernel <linux-kernel@vger.kernel.org>
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	 <4140EDDD.8010808@optonline.net>
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Date: Thu, 09 Sep 2004 17:53:50 -0700
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On Thu, 2004-09-09 at 19:57 -0400, Nathan Bryant wrote:
> You sure this is right? The comment seems to imply that writing the 
> reset command to the registers also clears the interrupt mask. So you 
> might need to have the e100_disable_irq() both before and after the reset.

Good point - I'm not sure.  I don't really know what would cause the
chip to raise an interrupt.  Could it do it spontaneously, in which case
there's always a window between poking the selective/software_reset and
the disable_irq?  Or is it that the chip raises an interrupt on reset,
which is masked by disabling the interrupt, but then it enables the
interrupt after the reset is complete?  Or perhaps "it's unmasked after
reset" means "after a hardware reset (power cycle)" and not by poking
the reset registers.

Well, there was definitely a real bug there before, and it works with a
bit of testing.  We'll see how it goes over the next few days (and maybe
someone who actually understands this hardware will weigh in).

	J

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