Return-Path: Received: by vger.rutgers.edu via listexpand id ; Thu, 16 Sep 1999 22:40:23 -0400 Received: by vger.rutgers.edu id ; Thu, 16 Sep 1999 22:37:14 -0400 Received: from mole.spellcast.com ([199.233.184.201]:2365 "EHLO mole.spellcast.com") by vger.rutgers.edu with ESMTP id ; Thu, 16 Sep 1999 22:34:54 -0400 Date: Thu, 16 Sep 1999 22:34:25 -0400 (EDT) From: Benjamin LaHaise To: Rich Bodo cc: linux-kernel@vger.rutgers.edu Subject: Re: PLX 9050 chip In-Reply-To: <37E19313.6090BE36@ostel.com> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-linux-kernel@vger.rutgers.edu Content-Length: 644 Lines: 18 On Thu, 16 Sep 1999, Rich Bodo wrote: > Does anyone on this list have experience with the PLX 9050 PCI bus > interface chip? I am having this strange problem when reading from ... I'd suggest calling PLX tech support -- they're actually helpful in answering questions. From experience, I found that the PLX chips simply have too many configuration registers that you must choose the correct settings for, but once you get it right they work quite well. -ben - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/