Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S271176AbUJVB51 (ORCPT ); Thu, 21 Oct 2004 21:57:27 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S271119AbUJVB4c (ORCPT ); Thu, 21 Oct 2004 21:56:32 -0400 Received: from omx3-ext.sgi.com ([192.48.171.20]:22987 "EHLO omx3.sgi.com") by vger.kernel.org with ESMTP id S271087AbUJVBt1 (ORCPT ); Thu, 21 Oct 2004 21:49:27 -0400 Date: Thu, 21 Oct 2004 18:33:22 -0700 (PDT) From: X-X-Sender: To: Benjamin Herrenschmidt cc: "David S. Miller" , Jesse Barnes , Andrew Morton , Linux Kernel list , , Jeff Garzik , Subject: Re: [PATCH] use mmiowb in tg3.c In-Reply-To: <1098407804.6071.22.camel@gaston> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 576 Lines: 20 On Fri, 22 Oct 2004, Benjamin Herrenschmidt wrote: > ... > Typically, our normal "light" write barrier doesn't reorder between cacheable > and non-cacheable (MMIO) stores, which is why we had to put some heavy sync > barrier in our MMIO writes macros. > ... Do you mean "impose order" rather than "reorder" here? -- Arthur - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/