Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S262670AbVAFARG (ORCPT ); Wed, 5 Jan 2005 19:17:06 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S262644AbVAFARF (ORCPT ); Wed, 5 Jan 2005 19:17:05 -0500 Received: from kepler.fjfi.cvut.cz ([147.32.6.11]:2965 "EHLO kepler.fjfi.cvut.cz") by vger.kernel.org with ESMTP id S262670AbVAFAO0 (ORCPT ); Wed, 5 Jan 2005 19:14:26 -0500 Date: Thu, 6 Jan 2005 01:14:24 +0100 (CET) From: Martin Drab To: Linux Kernel Mailing List Subject: Re: APIC/LAPIC hanging problems on nForce2 system. In-Reply-To: <41DC2353.7010206@gmx.de> Message-ID: References: <41DC1AD7.7000705@gmx.de> <41DC2113.8080604@gmx.de> <41DC2353.7010206@gmx.de> MIME-Version: 1.0 Content-Type: MULTIPART/MIXED; BOUNDARY="546507526-1761170685-1104970464=:26952" Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 37409 Lines: 656 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --546507526-1761170685-1104970464=:26952 Content-Type: TEXT/PLAIN; charset=US-ASCII On Wed, 5 Jan 2005, Prakash K. Cheemplavam wrote: > lspci -xxx > > then check > > 0000:00:00.0 Host bridge: nVidia Corporation nForce2 AGP (different > version?) (rev c1) > 00: de 10 e0 01 06 00 b0 00 c1 00 00 06 00 00 80 00 > 10: 08 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 00 > 20: 00 00 00 00 00 00 00 00 00 00 00 00 7b 14 00 1c > 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 > 40: 02 60 30 00 1b 42 00 1f 02 03 00 00 ff ff ff ff > 50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff > 60: 08 00 01 20 20 00 88 80 10 00 00 00 01 ff 01 9f <---- > 70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff > 80: 00 01 00 00 ff ff ff 3f 01 00 00 00 01 80 00 00 > 90: 14 80 40 a7 14 80 40 a5 00 30 00 00 00 00 00 00 > a0: 40 00 00 00 32 fb 10 00 01 00 00 00 00 00 00 00 > b0: cc ff 07 00 00 00 00 00 00 00 00 00 00 00 00 00 > c0: 33 33 03 00 00 00 00 00 00 00 00 00 00 00 00 00 > d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > e0: d6 01 47 00 16 30 00 10 00 00 00 00 00 00 00 00 > f0: 0f 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 > > > From fixup.c: > * Chip Old value New value > * C17 0x1F0FFF01 0x1F01FF01 > * C18D 0x9F0FFF01 0x9F01FF01 > > If there is old value, it needs to be fixed. OK, so I investigated a bit, and found the following interesting and seemingly unexpected situation. I wrote a trivial debugging patch (attached as "nForce2-Fixup-DEBUG.diff") to take a closer look at what is going on in there. Result is attached as "kernel.log". Namely interesting part: ... DEBUG: pci_fixup_nforce2() called. DEBUG: nForce2 revision byte = 0xC1. DEBUG: fixed value = 0x9F01FF01. DEBUG: current value = 0x8F0FFF01. <--------------- ... So that means, that the device doesn't have the "C1 Halt Disconnect" enabled at that point, and, though, no fixup is done. However, if you take a closer look at the result of "lspci -xxx" (attached as "lspci-xxx.log"), 00:00.0 Host bridge: nVidia Corporation nForce2 AGP (different version?) (rev c1) ... 60: 08 00 01 20 20 00 88 80 10 00 00 00 01 ff 0f 9f <------- ... you'll notice, that all of a sudden that bit 28 of PCI.0x6c *is set!! That means, that sometimes later, after the pci_fixup_nforce2() is called, something, smewhere, somehow has to set the bit to 1. But this part in the arch/i386/pci/fixup.c prevents it. /* * Apply fixup only if C1 Halt Disconnect is enabled * (bit28) because it is not supported on some boards. */ vvvvvvvvvvvvvvvvv if ((val & (1 << 28)) && val != fixed_val) { printk(KERN_WARNING "PCI: nForce2 C1 Halt Disconnect fixup\n"); pci_write_config_dword(dev, 0x6c, fixed_val); } So my question is: Is the condition necessary? If there really are boards, that don't support this, then is would probably have to be a more sophisticated test, or the fixup would have to be called again later, when the flag is set. BTW.: Any clue on what could possibly set the flag? Anyway, I wrote a trivial patch (attached as "nForce2-Fixup-Fix.diff") which simply just removes the condition mentioned above. With this patch the fixup IS done on my MB and then everything works OK. So the problem really *is here. But I'm afraid that this trivial solution is rather an ugly workaround, then a real fix to this problem. Upgrade of my BIOS could probably solve the problem, but since I thought it may be necessary to really fix the problem, so that others don't need to care to upgrade the BIOS as well. So I didn't upgrade, yet, in order to be able to test any better solution that there might be (if there is any). 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