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Mon, 22 Apr 2019 00:26:55 -0700 Received: from [172.23.37.108] (helo=xhdnagasure40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1hITLq-0003EY-Bf; Mon, 22 Apr 2019 00:26:54 -0700 From: Naga Sureshkumar Relli To: , CC: , , , , , , , , , Naga Sureshkumar Relli Subject: [LINUX PATCH] spi: spi-mem: zynq-qspi: Fix build error on architectures missing readsl/writesl Date: Mon, 22 Apr 2019 12:56:49 +0530 Message-ID: <1555918009-13172-1-git-send-email-naga.sureshkumar.relli@xilinx.com> X-Mailer: git-send-email 2.7.4 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(39860400002)(346002)(136003)(396003)(2980300002)(199004)(189003)(2906002)(305945005)(16586007)(478600001)(51416003)(7696005)(63266004)(26005)(81166006)(48376002)(8676002)(36386004)(50226002)(186003)(81156014)(316002)(106002)(8936002)(77096007)(54906003)(110136005)(486006)(47776003)(36756003)(336012)(9786002)(5660300002)(70586007)(2616005)(70206006)(126002)(426003)(356004)(6666004)(476003)(4326008)(7416002)(107886003)(50466002);DIR:OUT;SFP:1101;SCL:1;SRVR:BN6PR02MB2676;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; 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Signed-off-by: Naga Sureshkumar Relli Reported-by: kbuild test robot --- Verified the same by cross compiling the zynq-qspi driver for alpha architecture ARCH=alpha CROSS_COMPILE=alpha-linux-gnu- make all Reference took from the below commit 0cf1725 mtd: spi-nor: cqspi: Fix build on arches missing readsl/writesl --- drivers/spi/spi-zynq-qspi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c index 8079d00..c6bee67 100644 --- a/drivers/spi/spi-zynq-qspi.c +++ b/drivers/spi/spi-zynq-qspi.c @@ -407,8 +407,8 @@ static void zynq_qspi_write_op(struct zynq_qspi *xqspi, int txcount, count = txcount; if (xqspi->txbuf) { - writesl(xqspi->regs + ZYNQ_QSPI_TXD_00_00_OFFSET, - xqspi->txbuf, count); + iowrite32_rep(xqspi->regs + ZYNQ_QSPI_TXD_00_00_OFFSET, + xqspi->txbuf, count); xqspi->txbuf += count * 4; } else { for (k = 0; k < count; k++) @@ -433,8 +433,8 @@ static void zynq_qspi_read_op(struct zynq_qspi *xqspi, int rxcount) if (count > rxcount) count = rxcount; if (xqspi->rxbuf) { - readsl(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET, - xqspi->rxbuf, count); + ioread32_rep(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET, + xqspi->rxbuf, count); xqspi->rxbuf += count * 4; } else { for (k = 0; k < count; k++) -- 2.7.4