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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 23 Apr 2019 21:16:38 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x3NKGbaE32702606 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 23 Apr 2019 20:16:37 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C54DDB2067; Tue, 23 Apr 2019 20:16:37 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8A32EB2065; Tue, 23 Apr 2019 20:16:37 +0000 (GMT) Received: from paulmck-ThinkPad-W541 (unknown [9.80.223.68]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Tue, 23 Apr 2019 20:16:37 +0000 (GMT) Received: by paulmck-ThinkPad-W541 (Postfix, from userid 1000) id 2B6A316C2A4D; Tue, 23 Apr 2019 13:16:37 -0700 (PDT) Date: Tue, 23 Apr 2019 13:16:37 -0700 From: "Paul E. McKenney" To: Peter Zijlstra Cc: Nicholas Piggin , LKMM Maintainers -- Akira Yokosawa , Andrea Parri , Boqun Feng , David Howells , Daniel Lustig , Jade Alglave , Kernel development list , Luc Maranget , Alan Stern , Will Deacon Subject: Re: [PATCH] Documentation: atomic_t.txt: Explain ordering provided by smp_mb__{before,after}_atomic() Reply-To: paulmck@linux.ibm.com References: <20190419180017.GP4038@hirez.programming.kicks-ass.net> <20190419182620.GF14111@linux.ibm.com> <1555719429.t9n8gkf70y.astroid@bobo.none> <20190420085440.GK14111@linux.ibm.com> <20190423121715.GQ4038@hirez.programming.kicks-ass.net> <20190423132116.GJ3923@linux.ibm.com> <20190423132620.GU4038@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190423132620.GU4038@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 x-cbid: 19042320-0052-0000-0000-000003AFFA16 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010982; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000285; SDB=6.01193370; UDB=6.00625585; IPR=6.00974190; MB=3.00026562; MTD=3.00000008; XFM=3.00000015; UTC=2019-04-23 20:16:42 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19042320-0053-0000-0000-0000609B028F Message-Id: <20190423201637.GW3923@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-04-23_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=787 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1904230142 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 23, 2019 at 03:26:20PM +0200, Peter Zijlstra wrote: > On Tue, Apr 23, 2019 at 06:21:16AM -0700, Paul E. McKenney wrote: > > On Tue, Apr 23, 2019 at 02:17:15PM +0200, Peter Zijlstra wrote: > > > On Sat, Apr 20, 2019 at 01:54:40AM -0700, Paul E. McKenney wrote: > > > > 3. Make non-value-returning atomics provide full ordering. > > > > This would of course need some benchmarking, but would be a > > > > simple change to make and would eliminate a large class of > > > > potential bugs. My guess is that the loss in performance > > > > would be non-negligible, but who knows? > > > > > > Well, only for the architectures that have > > > smp_mb__{before,after}_atomic() as barrier(), which are: ia64, mips, > > > s390, sparc, x86 and xtense. > > > > The weakly ordered architectures would need to add the equivalent of > > smp_mb() before and after, right? This might result in a more noticeable > > loss of performance. > > The weak archs already have: smp_mb__{before,after}_atomic() := > smp_mb(). Agreed, but I thought that one of the ideas going forward was to get rid of smp_mb__{before,after}_atomic(). Thanx, Paul