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Cc:     linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
From:   Stephen Boyd <sboyd@kernel.org>
Subject: Re: [PATCH v3 1/2] clk:Fix divide-by-zero in divider_ro_round_rate_parent
To:     jbrunet@baylibre.com, mojha@codeaurora.org,
        mturquette@baylibre.com, nixiaoming@huawei.com,
        sboyd@codeaurora.org, soren.brinkmann@xilinx.com
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Date:   Tue, 23 Apr 2019 15:51:42 -0700
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Quoting nixiaoming (2019-03-30 06:54:50)
> In the function divider_recalc_rate() The judgment of the return value of
> _get_div() indicates that the return value of _get_div() can be 0.

When does _get_div() return 0? It can't be CLK_DIVIDER_MAX_AT_ZERO or
CLK_DIVIDER_POWER_OF_TWO. I suppose it could be CLK_DIVIDER_ONE_BASED if
CLK_DIVIDER_ALLOW_ZERO is set? Or just CLK_DIVIDER_ALLOW_ZERO is set? Or
a table that has 0 in it for some odd reason.

> In order to avoid the divide-by-zero error, add check for return value
> of _get_div() in the divider_ro_round_rate_parent()
>=20
> Signed-off-by: nixiaoming <nixiaoming@huawei.com>
> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
> ---
>  drivers/clk/clk-divider.c | 3 +++
>  1 file changed, 3 insertions(+)
>=20
> diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
> index e5a1726..f4bf7a4 100644
> --- a/drivers/clk/clk-divider.c
> +++ b/drivers/clk/clk-divider.c
> @@ -347,6 +347,9 @@ long divider_ro_round_rate_parent(struct clk_hw *hw, =
struct clk_hw *parent,
>         int div;
> =20
>         div =3D _get_div(table, val, flags, width);
> +       /* avoid divide-by-zero */
> +       if (!div)
> +               return -EINVAL;

Can you please give more details on what's happening here? Who's the
caller? What are the arguments being passed in? Shouldn't we check for
CLK_DIVIDER_ALLOW_ZERO and then return prate as it comes in instead of
returning an error?

> =20
>         /* Even a read-only clock can propagate a rate change */
>         if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {