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Date:   Wed, 24 Apr 2019 19:22:57 -0400 (EDT)
From:   Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To:     Paul Burton <paul.burton@mips.com>
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Subject: Re: [RFC PATCH for 5.2 10/10] rseq/selftests: mips: use break
 instruction for RSEQ_SIG
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Thread-Topic: rseq/selftests: mips: use break instruction for RSEQ_SIG
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----- On Apr 24, 2019, at 7:17 PM, Paul Burton paul.burton@mips.com wrote:

> Hi Mathieu,
> 
> On Wed, Apr 24, 2019 at 07:12:03PM -0400, Mathieu Desnoyers wrote:
>> Does the following comment above the forest of #ifdef work for you ?
>> 
>> /*
>>  * RSEQ_SIG uses the break instruction. The instruction pattern is:
>>  *
>>  * On MIPS:
>>  *      0350000d        break     0x350
>>  *
>>  * On nanoMIPS32:
>>  *      00100350        break     0x350
>>  *
>>  * On microMIPS:
>>  *      0000d407        break     0x350
>>  *
>>  * For nanoMIPS32 and microMIPS, the instruction stream is encoded as 16-bit
>>  * halfwords, so the signature halfwords need to be swapped accordingly for
>>  * little-endian.
>>  */
> 
> I'd probably just say nanoMIPS rather than nanoMIPS32, because when we
> get nanoMIPS64 in the future it'll be a superset of nanoMIPS32 & the
> break encoding will be the same.

Done.

> 
> But otherwise it looks good to me :)

Great! I've added your "Suggested-by" tag to the patch.

Thanks,

Mathieu

> 
> Thanks,
>     Paul

-- 
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com