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[209.132.180.67]) by mx.google.com with ESMTP id i9si23061009pfr.111.2019.04.25.08.32.20; Thu, 25 Apr 2019 08:32:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=tgSpUmat; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730429AbfDYKkx (ORCPT + 99 others); Thu, 25 Apr 2019 06:40:53 -0400 Received: from mail-ed1-f68.google.com ([209.85.208.68]:39627 "EHLO mail-ed1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730417AbfDYKkw (ORCPT ); Thu, 25 Apr 2019 06:40:52 -0400 Received: by mail-ed1-f68.google.com with SMTP id k45so18720230edb.6; Thu, 25 Apr 2019 03:40:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:openpgp:autocrypt:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=gNB4e83qYSu3jEfl2FW40Y0PG+ASh9V6LGPyf9ymr3w=; b=tgSpUmatI+ryG1BJzbCfxZgUT6Jg222gPCn43wwzMfvCFyawFh+p2Hnvwa+7q3ErOb EYgTdtI+q4+KdNPYY6N4XTI642bM6N7Fki2byLDlmosxo3MmQkXN3NmmxAjWbvj2O74c /ETMz+HNZ8y7TXOc/KlsArUiWBuV/NIb3QiWlmbNenHjzdmWZ1LyADQHB6IugmvBNyde k+EdhmXguu/Dwhasz0Y8ABo+nXx9W+eWO8gmrrV3NEOLUv4k/uckReCgo9kS7WzBM6pH rmeQYv0yw1/cUXzv/v9HIvp1GsxsqnU9HcGuEHfZe3TibpHNr/vVzC7Hz42KmHQLwwmB BhSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:openpgp:autocrypt :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=gNB4e83qYSu3jEfl2FW40Y0PG+ASh9V6LGPyf9ymr3w=; b=qIxQyYaOs9EDsj+ON8TLlg5NeepIKGTzRdGT4wf0zJADqz7WVLltZV3uAVu6cUy5+c e/Qv2+4ejTGwydZdxr2ZP1HkKlxpSNzAbzUP7ZiU91214FbSyyweWPkM/JajP5sdSKS4 zvkMrOC+5taU//k/a8+BogX+vjI5bBl4fW/9p7fIPfKbb21DGHragk45eCiLI9pKB/Lp lUGh5S463XBDdv5yKD78MDCwokrYIsCQP0i11ZVaibJhth0ZVTlvc097KNjRSdHpmtCR f/k03xzfYqnTucm4L8EGrVII6vM2ZFbPWOYeGp7a+XuPyXiem30Xqc4zqFjn7a75LVPq 5E9A== X-Gm-Message-State: APjAAAXQ3LQ4FMY7Mb1GNSZwkt4y9BMnJn9ZlihUeD0A2O9Yu55dyjsk 5k0CnaY45zcoVIoU9sLgy3g= X-Received: by 2002:a17:906:7c12:: with SMTP id t18mr16190051ejo.59.1556188849794; Thu, 25 Apr 2019 03:40:49 -0700 (PDT) Received: from ziggy.stardust ([37.223.141.112]) by smtp.gmail.com with ESMTPSA id g6sm6274572edd.48.2019.04.25.03.40.48 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 03:40:48 -0700 (PDT) Subject: Re: [PATCH 1/2] serial: 8250-mtk: add follow control To: Long Cheng , Greg Kroah-Hartman Cc: Jiri Slaby , "Gustavo A. R. Silva" , Peter Shih , linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, srv_heupstream@mediatek.com, Yingjoe Chen , YT Shen , Zhenbao Liu , Changqi Hu References: <1556181691-10293-1-git-send-email-long.cheng@mediatek.com> <1556181691-10293-2-git-send-email-long.cheng@mediatek.com> From: Matthias Brugger Openpgp: preference=signencrypt Autocrypt: addr=matthias.bgg@gmail.com; prefer-encrypt=mutual; keydata= mQINBFP1zgUBEAC21D6hk7//0kOmsUrE3eZ55kjc9DmFPKIz6l4NggqwQjBNRHIMh04BbCMY fL3eT7ZsYV5nur7zctmJ+vbszoOASXUpfq8M+S5hU2w7sBaVk5rpH9yW8CUWz2+ZpQXPJcFa OhLZuSKB1F5JcvLbETRjNzNU7B3TdS2+zkgQQdEyt7Ij2HXGLJ2w+yG2GuR9/iyCJRf10Okq gTh//XESJZ8S6KlOWbLXRE+yfkKDXQx2Jr1XuVvM3zPqH5FMg8reRVFsQ+vI0b+OlyekT/Xe 0Hwvqkev95GG6x7yseJwI+2ydDH6M5O7fPKFW5mzAdDE2g/K9B4e2tYK6/rA7Fq4cqiAw1+u EgO44+eFgv082xtBez5WNkGn18vtw0LW3ESmKh19u6kEGoi0WZwslCNaGFrS4M7OH+aOJeqK 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lc8SuADCmMD+kBOVWktZyzkBkDfBXlTWl46T/8291lEspDWe5YW1ZAH/HdCR1rQNZWjNCpB2 Cic58CYMD1rSonCnbfUeyZYNNhNHZosl4dl7f+am87Q2x3pK0DLSoJRxWb7vZB0uo9CzCSm3 I++aYozF25xQoT+7zCx2cQi33jwvnJAK1o4VlNx36RfrxzBqc1uZGzJBCQu48UjmUSsTwWC3 HpE/D9sM+xACs803lFUIZC5H62G059cCPAXKgsFpNMKmBAWweBkVJAisoQeX50OP+/11ArV0 cv+fOTfJj0/KwFXJaaYh3LUQNILLBNxkSrhCLl8dUg53IbHx4NfIAgqxLWGfXM8DY1aFdU79 pac005PuhxCWkKTJz3gCmznnoat4GCnL5gy/m0Qk45l4PFqwWXVLo9AQg2Kp3mlIFZ6fsEKI AN5hxlbNvNb9V2Zo5bFZjPWPFTxOteM0omUAS+QopwU0yPLLGJVf2iCmItHcUXI+r2JwH1CJ jrHWeQEI2ucSKsNa8FllDmG/fQ== Message-ID: Date: Thu, 25 Apr 2019 12:40:47 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <1556181691-10293-2-git-send-email-long.cheng@mediatek.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/04/2019 10:41, Long Cheng wrote: > Add SW and HW follow control function. Can you please explain a bit more what you are doing in this patch. You change the setting of the registers for different baud rates. Please elaborate what is happening there. > > Signed-off-by: Long Cheng > --- > drivers/tty/serial/8250/8250_mtk.c | 60 ++++++++++++++++++++++-------------- > 1 file changed, 37 insertions(+), 23 deletions(-) > > diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c > index c1fdbc0..959fd85 100644 > --- a/drivers/tty/serial/8250/8250_mtk.c > +++ b/drivers/tty/serial/8250/8250_mtk.c > @@ -21,12 +21,14 @@ > > #include "8250.h" > > -#define UART_MTK_HIGHS 0x09 /* Highspeed register */ > -#define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */ > -#define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */ > +#define MTK_UART_HIGHS 0x09 /* Highspeed register */ > +#define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */ > +#define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */ Rename looks good to me. But I'd prefer to have it in a separate patch. > #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ > - > #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */ > +#define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */ > +#define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */ > +#define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */ > #define MTK_UART_DMA_EN_TX 0x2 > #define MTK_UART_DMA_EN_RX 0x5 > > @@ -46,6 +48,7 @@ enum dma_rx_status { > struct mtk8250_data { > int line; > unsigned int rx_pos; > + unsigned int clk_count; What is that for, not used in this patch. > struct clk *uart_clk; > struct clk *bus_clk; > struct uart_8250_dma *dma; > @@ -196,9 +199,15 @@ static void mtk8250_shutdown(struct uart_port *port) > mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, > struct ktermios *old) > { > + unsigned short fraction_L_mapping[] = { > + 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF > + }; > + unsigned short fraction_M_mapping[] = { > + 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3 > + }; > struct uart_8250_port *up = up_to_u8250p(port); > + unsigned int baud, quot, fraction; > unsigned long flags; > - unsigned int baud, quot; > > #ifdef CONFIG_SERIAL_8250_DMA > if (up->dma) { > @@ -214,7 +223,7 @@ static void mtk8250_shutdown(struct uart_port *port) > serial8250_do_set_termios(port, termios, old); > > /* > - * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS) > + * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS) > * > * We need to recalcualte the quot register, as the claculation depends > * on the vaule in the highspeed register. > @@ -230,18 +239,11 @@ static void mtk8250_shutdown(struct uart_port *port) > port->uartclk / 16 / UART_DIV_MAX, > port->uartclk); > > - if (baud <= 115200) { > - serial_port_out(port, UART_MTK_HIGHS, 0x0); > + if (baud < 115200) { > + serial_port_out(port, MTK_UART_HIGHS, 0x0); > quot = uart_get_divisor(port, baud); > - } else if (baud <= 576000) { > - serial_port_out(port, UART_MTK_HIGHS, 0x2); > - > - /* Set to next lower baudrate supported */ > - if ((baud == 500000) || (baud == 576000)) > - baud = 460800; > - quot = DIV_ROUND_UP(port->uartclk, 4 * baud); So we allow now also these baud rates? Then you have to update the comment as well. Regards, Matthias > } else { > - serial_port_out(port, UART_MTK_HIGHS, 0x3); > + serial_port_out(port, MTK_UART_HIGHS, 0x3); > quot = DIV_ROUND_UP(port->uartclk, 256 * baud); > } > > @@ -258,17 +260,29 @@ static void mtk8250_shutdown(struct uart_port *port) > /* reset DLAB */ > serial_port_out(port, UART_LCR, up->lcr); > > - if (baud > 460800) { > + if (baud >= 115200) { > unsigned int tmp; > > - tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud); > - serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1); > - serial_port_out(port, UART_MTK_SAMPLE_POINT, > - (tmp - 2) >> 1); > + tmp = (port->uartclk / (baud * quot)) - 1; > + serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp); > + serial_port_out(port, MTK_UART_SAMPLE_POINT, > + (tmp >> 1) - 1); > + > + /*count fraction to set fractoin register */ > + fraction = ((port->uartclk * 100) / baud / quot) % 100; > + fraction = DIV_ROUND_CLOSEST(fraction, 10); > + serial_port_out(port, MTK_UART_FRACDIV_L, > + fraction_L_mapping[fraction]); > + serial_port_out(port, MTK_UART_FRACDIV_M, > + fraction_M_mapping[fraction]); > } else { > - serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00); > - serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff); > + serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00); > + serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff); > + serial_port_out(port, MTK_UART_FRACDIV_L, 0x00); > + serial_port_out(port, MTK_UART_FRACDIV_M, 0x00); > } > + if (uart_console(port)) > + up->port.cons->cflag = termios->c_cflag; > > spin_unlock_irqrestore(&port->lock, flags); > /* Don't rewrite B0 */ >