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Date:   Thu, 25 Apr 2019 19:01:35 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Benjamin GAIGNARD <benjamin.gaignard@st.com>
Cc:     Sudeep Holla <sudeep.holla@arm.com>,
        Benjamin Gaignard <benjamin.gaignard@linaro.org>,
        Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
        Shawn Guo <shawnguo@kernel.org>,
        "s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
        Fabio Estevam <fabio.estevam@nxp.com>,
        Loic PALLARDY <loic.pallardy@st.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        "linux-imx@nxp.com" <linux-imx@nxp.com>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RESEND PATCH 0/7] Introduce bus domains controller framework
Message-ID: <20190425180135.GA23183@sirena.org.uk>
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On Tue, Apr 23, 2019 at 02:17:23PM +0000, Benjamin GAIGNARD wrote:
> On 4/23/19 3:55 PM, Sudeep Holla wrote:

> > The above statement makes me wonder if Cortex-M4 firmware is really
> > non-secure, if so why does it need such an isolation from other masters
> > like Cortex-A7. For me Cortex-M4 is secure and Cortex-A7 can execute
> > in non-secure hence Cortex-M4 needs to be isolated from Cortex-A7 as
> > mentioned in the above excerpts from the datasheet.

> Cortex-M4 firmware is non-secure, it could be a free RTOS.
> ETZPC doesn't isolate Cortex M4 or A7 but control which of them have=20
> access to hardware blocks.
> For example ETZPC controls if M4 or A7 can have access to I2C hardware=20
> blocks. The goal is to make sure
> firmware running on each side don't use the hardware blocks of the other=
=20
> side.

The goal AIUI is mainly for robustness rather than security - trying to
mitigate against any bugs that might happen, making them more apparent
during development and mititgating their impact if they slip through.

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