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[209.132.180.67]) by mx.google.com with ESMTP id o33si26351772plb.189.2019.04.26.10.40.32; Fri, 26 Apr 2019 10:40:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726377AbfDZRhz (ORCPT + 99 others); Fri, 26 Apr 2019 13:37:55 -0400 Received: from thoth.sbs.de ([192.35.17.2]:45300 "EHLO thoth.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725944AbfDZRhz (ORCPT ); Fri, 26 Apr 2019 13:37:55 -0400 Received: from mail1.sbs.de (mail1.sbs.de [192.129.41.35]) by thoth.sbs.de (8.15.2/8.15.2) with ESMTPS id x3QHbcF1004753 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 26 Apr 2019 19:37:38 +0200 Received: from [167.87.22.130] ([167.87.22.130]) by mail1.sbs.de (8.15.2/8.15.2) with ESMTP id x3QHbZup026019; Fri, 26 Apr 2019 19:37:36 +0200 Subject: Re: [PATCH 2/2] gpio: sch: Add interrupt support To: Andy Shevchenko Cc: "Enrico Weigelt, metux IT consult" , Andy Shevchenko , Mika Westerberg , Linus Walleij , Bartosz Golaszewski , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , ACPI Devel Maling List , "Rafael J. Wysocki" References: <20190424081802.GV2654@lahna.fi.intel.com> <5a28f22c-22f7-760a-d076-68ff19800d44@siemens.com> <20190424084259.GW2654@lahna.fi.intel.com> <7e328b7e-f4f0-851a-4152-a9ffd058201c@siemens.com> <20190424094506.GA2654@lahna.fi.intel.com> <292e6eff-82cc-6e4d-925b-77a60399e2e0@siemens.com> <20190424100130.GB2654@lahna.fi.intel.com> <1200464b-f969-ebc2-ae82-1f8ca98aaca1@siemens.com> <20190424103306.GC2654@lahna.fi.intel.com> <9377620b-d74a-04d9-a51e-8590400b1c0f@siemens.com> <20190426130615.GT9224@smile.fi.intel.com> <2f3da791-4a10-c2c4-dc5a-22ad16ed7be6@siemens.com> From: Jan Kiszka Message-ID: Date: Fri, 26 Apr 2019 19:37:35 +0200 User-Agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 26.04.19 19:20, Andy Shevchenko wrote: > On Fri, Apr 26, 2019 at 7:05 PM Jan Kiszka wrote: >> >> On 26.04.19 16:42, Enrico Weigelt, metux IT consult wrote: >>> On 26.04.19 15:36, Jan Kiszka wrote: >>> >>>> At the same time, there are no real alternatives - to my> knowledge - for the value it brings (various bindings) to simply >>> switch> the engine. >>> Which value exactly does that collection of crude wrappers and broken >>> attempts to buypass the kernel (driving gpios via /dev/mem *facepalm*) >>> provide ? >> >> Leaving that blunt hack aside: >> >> import mraa >> >> pin = mraa.Gpio(13) >> pin.dir(mraa.DIR_OUT) >> pin.write(1) >> >> And the same goes for nodejs, java and c++. >> >> Moreover, this allows you to abstract away where "Pin 13" actually came from on >> that board if the kernel changes (BSP -> upstream...) or the extension board or >> ... > > The problem here is opaque number. This has to be chip + *relative* pin number/ > See this: > https://stackoverflow.com/questions/55532410/how-do-linux-gpio-numbers-get-their-values/55579640#55579640 > ...and device path based discovery of the base: https://github.com/siemens/mraa/commits/jan/queue And I think that makes good use cases for application-level abstractions like in mraa. You don't want all user having to learn those nasty details, for devicetree, ACPI, and even worse stuff. Jan -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux