Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp940802yba; Fri, 26 Apr 2019 11:16:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqxBF2g5z1C8TCIzZz5QcPLgGDQXxBCqm6ZXbO9jKRPNzI0QFMbMhXQGM2iaPA8HWE3jqmKY X-Received: by 2002:a17:902:2907:: with SMTP id g7mr47629440plb.238.1556302611454; Fri, 26 Apr 2019 11:16:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556302611; cv=none; d=google.com; s=arc-20160816; b=L48GqhjvEAi5BUFoYbR6caA7cinfu889aZ3ilUr8ACVzxpsQIAX8L3rkKrlWFT984a q7E9zJ1rbC/PWUbSkzH1q+Fdq1cx7JHCfDNYU7Pjlo8tBC4AhFFRZ3PGsMzKdqD7kVEl 5p3T7++PabmT91E5duNeFn9/Cx31WDxiYLPC1wYHwsyRqhEEFpKYbR5VY+7MtH12wAJv rj56k2rM3Q0nTfmdyta/HJvA2ZXvYs2DSJnnSsapi+Jz2cvrFoNzMUFpUzNZSdLFnLtu U+Jt7lDGRX3djwTPG/exeuBSqsRGQdxEehxODQ5g+sJKYA6nXc2luYD2HoWY3gFxZ6mG Ufqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date; bh=UXB5MYZ3T9iyatv6zHILnRdHzmNU/AzU/yHk69srKlM=; b=BrZRS3Ghq9HdSLPzZSV7dpukjF598Z4xjFFG1TanEFZeOT9QYzGlJnVADE44mh9laY iSsB2tyToEkNwAXcqA/KwetYyvmQyamC/xmMXfpKzj/ckZn0HjbdwKdmajQRgCot18XU ne/YIvtOB16OS5XZNvWIXDUiV3OQex6eZ5lqwCLlbNyNVoNa4yLJaz/h/XChCcJg+duE 1cltosq8rtZBWrRF9tBd7Ts1X5XChTzQttLTm6DKVQW6wDpddEq5U2Vnyasx0TBu8g8t Mb5tOPSuj0xvQHo28J2djaVdJP1FT9UWEbhzd97HpKk9RKBlvylzeLlz0x4d/ZhiX9tD UuPA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b15si27294402pfb.231.2019.04.26.11.16.34; Fri, 26 Apr 2019 11:16:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726255AbfDZSPk (ORCPT + 99 others); Fri, 26 Apr 2019 14:15:40 -0400 Received: from www.llwyncelyn.cymru ([82.70.14.225]:43472 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726005AbfDZSPk (ORCPT ); Fri, 26 Apr 2019 14:15:40 -0400 Received: from alans-desktop (82-70-14-226.dsl.in-addr.zen.co.uk [82.70.14.226]) by fuzix.org (8.15.2/8.15.2) with ESMTP id x3QIFFQe017912; Fri, 26 Apr 2019 19:15:16 +0100 Date: Fri, 26 Apr 2019 19:15:15 +0100 From: Alan Cox To: Sugaya Taichi Cc: Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Subject: Re: [PATCH v3] serial: Add Milbeaut serial control Message-ID: <20190426191515.757e6015@alans-desktop> In-Reply-To: <1555555916-22251-1-git-send-email-sugaya.taichi@socionext.com> References: <1555555916-22251-1-git-send-email-sugaya.taichi@socionext.com> Organization: Intel Corporation X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org O > +static void mlb_usio_set_termios(struct uart_port *port, > + struct ktermios *termios, struct ktermios *old) > +{ > + unsigned int escr, smr = MLB_USIO_SMR_SOE; > + unsigned long flags, baud, quot; > + > + switch (termios->c_cflag & CSIZE) { > + case CS5: > + escr = MLB_USIO_ESCR_L_5BIT; > + break; > + case CS6: > + escr = MLB_USIO_ESCR_L_6BIT; > + break; > + case CS7: > + escr = MLB_USIO_ESCR_L_7BIT; > + break; > + case CS8: > + default: > + escr = MLB_USIO_ESCR_L_8BIT; > + break; > + } > + > + if (termios->c_cflag & CSTOPB) > + smr |= MLB_USIO_SMR_SBL; > + > + if (termios->c_cflag & PARENB) { > + escr |= MLB_USIO_ESCR_PEN; > + if (termios->c_cflag & PARODD) > + escr |= MLB_USIO_ESCR_P; > + } If you don't suport CMSPAR then clear that bit in termios as well > + /* Set hard flow control */ > + if (of_property_read_bool(port->dev->of_node, "auto-flow-control") || > + (termios->c_cflag & CRTSCTS)) > + escr |= MLB_USIO_ESCR_FLWEN; That's just broken. The termios bits are the definitive things for the port, and in addition even if they are forced you need to correct the termios data. You might want to control flow control *at boot* with an OF property but doing it post boot is just busted. Alan