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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id h8sm10796866oti.64.2019.04.26.15.52.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 26 Apr 2019 15:52:02 -0700 (PDT) Date: Fri, 26 Apr 2019 17:52:02 -0500 From: Rob Herring To: =?iso-8859-1?Q?Cl=E9ment_P=E9ron?= Cc: Maxime Ripard , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: Re: [PATCH v3 2/8] dt-bindings: gpu: mali-midgard: Add bus clock bindings Message-ID: <20190426225202.GA12379@bogus> References: <20190417173031.9920-1-peron.clem@gmail.com> <20190417173031.9920-3-peron.clem@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20190417173031.9920-3-peron.clem@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 17, 2019 at 07:30:25PM +0200, Cl?ment P?ron wrote: > From: Icenowy Zheng > > Some SoCs adds a bus clock gate to the Mali Midgard GPU. > > Add the binding for the bus clock. > > Signed-off-by: Icenowy Zheng > Signed-off-by: Cl?ment P?ron > --- > Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++ > 1 file changed, 6 insertions(+) The panfrost driver is merged now (to drm-misc) if you want to add support for the 2nd clock. Reviewed-by: Rob Herring