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From:   Sowjanya Komatineni <skomatineni@nvidia.com>
To:     Mark Brown <broonie@kernel.org>
CC:     "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Timo Alho <talho@nvidia.com>,
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        "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
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Subject: RE: [PATCH V3 3/9] spi: add SPI_LSBYTE_FIRST mode
Thread-Topic: [PATCH V3 3/9] spi: add SPI_LSBYTE_FIRST mode
Thread-Index: AQHU89KBhHDIG9CWN0enZX6jwt4riaZDn6gAgAuZfqA=
Date:   Sat, 27 Apr 2019 00:32:58 +0000
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> On Mon, Apr 15, 2019 at 02:30:28PM -0700, Sowjanya Komatineni wrote:
> > Some SPI slaves expect bytes to be in least significant first order=20
> > and some expects most significant first oder.
> >=20
> > This patch adds support for requesting SPI master controllers for=20
> > least significant first order using SPI_LSBYTE_FIRST mode.
>
> This is byte ordering as opposed to bit ordering which the core already s=
upports.  Do you have any examples of devices that need this or is it just =
being added for completeness?  If devices are going to rely on this we prob=
ably need emulation > support in the core I guess given that this is a pret=
ty unusual controller feature.

Current upstream platforms have no specific device requirement but added th=
is feature as Tegra support it for specific requirements of some slaves.

[Changed mail client message format word wrap limit to 74 columns]

Thanks
Sowjanya