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From:   Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date:   Sat, 27 Apr 2019 22:20:52 +0200
Message-ID: <CAFBinCBHDf8N7J5C7SkCF44k+-H686EYbK9zm6TOg_oUWJ+vTw@mail.gmail.com>
Subject: Re: [PATCH v2 2/6] clk: meson: g12a: Add support for G12B CPUB clocks
To:     Neil Armstrong <narmstrong@baylibre.com>
Cc:     khilman@baylibre.com, jbrunet@baylibre.com,
        linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
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On Tue, Apr 23, 2019 at 11:15 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This patch support for the specific Amlogic G12B clocks.
>
> G12B clock driver is very close, the main differences are :
> - the clock tree is duplicated for the both clusters, and the
>   SYS_PLL are swapped between the clusters
> - G12A has additional clocks like for CSI an other components
>
> Here only the cpu clock tree is handled.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

while reviewing I used the public S922X datasheet from hardkernel to
verify the implementation.
I noticed that HHI_SYS_PLL_CNTL1  and HHI_SYS1_PLL_CNTL1 seem to have
a 19-bit fractional part for the sys_pll and sys1_pll clocks.
Neil, do you know more about the fractional parts on these clocks?


Regards
Martin