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Sat, 27 Apr 2019 23:05:12 +0100 Envelope-to: arnd@arndb.de, gregkh@linuxfoundation.org, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dragan.cvetic@xilinx.com, derek.kiernan@xilinx.com Received: from [149.199.110.15] (port=52636 helo=xirdraganc40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1hKVRY-0002Gu-4G; Sat, 27 Apr 2019 23:05:12 +0100 From: Dragan Cvetic To: , , , , , , CC: , Dragan Cvetic , Derek Kiernan Subject: [PATCH V3 06/12] misc: xilinx_sdfec: Add ability to configure turbo Date: Sat, 27 Apr 2019 23:05:00 +0100 Message-ID: <1556402706-176271-7-git-send-email-dragan.cvetic@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1556402706-176271-1-git-send-email-dragan.cvetic@xilinx.com> References: <1556402706-176271-1-git-send-email-dragan.cvetic@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.80.198;IPV:CAL;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(346002)(396003)(136003)(376002)(39860400002)(2980300002)(199004)(189003)(36756003)(28376004)(5660300002)(71366001)(14444005)(47776003)(44832011)(60926002)(11346002)(16586007)(316002)(446003)(956004)(486006)(54906003)(126002)(110136005)(476003)(2616005)(426003)(36906005)(7636002)(106002)(305945005)(336012)(2201001)(93146003)(48376002)(70586007)(70206006)(26826003)(478600001)(7696005)(186003)(50226002)(9786002)(50466002)(26005)(107886003)(246002)(4326008)(8676002)(76130400001)(76176011)(2906002)(51416003)(8936002)(356004)(6666004)(102446001)(461764006);DIR:OUT;SFP:1101;SCL:1;SRVR:BY2PR02MB2005;H:xir-pvapexch02.xlnx.xilinx.com;FPR:;SPF:Pass;LANG:en;PTR:unknown-80-198.xilinx.com;A:1;MX:1; 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Tested-by: Dragan Cvetic Signed-off-by: Derek Kiernan Signed-off-by: Dragan Cvetic --- drivers/misc/xilinx_sdfec.c | 77 ++++++++++++++++++++++++++++++++++++++++ include/uapi/misc/xilinx_sdfec.h | 71 ++++++++++++++++++++++++++++++++++++ 2 files changed, 148 insertions(+) diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c index 77ee62d..19b5f96 100644 --- a/drivers/misc/xilinx_sdfec.c +++ b/drivers/misc/xilinx_sdfec.c @@ -116,6 +116,12 @@ static dev_t xsdfec_devt; /* BYPASS Register */ #define XSDFEC_BYPASS_ADDR (0x3C) +/* Turbo Code Register */ +#define XSDFEC_TURBO_ADDR (0x100) +#define XSDFEC_TURBO_SCALE_MASK (0xFFF) +#define XSDFEC_TURBO_SCALE_BIT_POS (8) +#define XSDFEC_TURBO_SCALE_MAX (15) + /** * struct xsdfec_clks - For managing SD-FEC clocks * @core_clk: Main processing clock for core @@ -247,6 +253,71 @@ static int xsdfec_dev_release(struct inode *iptr, struct file *fptr) return 0; } +static int xsdfec_set_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + struct xsdfec_turbo turbo; + int err; + u32 turbo_write; + + err = copy_from_user(&turbo, arg, sizeof(turbo)); + if (err) + return -EFAULT; + + if (turbo.alg >= XSDFEC_TURBO_ALG_MAX) { + dev_err(xsdfec->dev, + "%s invalid turbo alg value %d for SDFEC%d", __func__, + turbo.alg, xsdfec->config.fec_id); + return -EINVAL; + } + + if (turbo.scale > XSDFEC_TURBO_SCALE_MAX) { + dev_err(xsdfec->dev, + "%s invalid turbo scale value %d for SDFEC%d", __func__, + turbo.scale, xsdfec->config.fec_id); + return -EINVAL; + } + + /* Check to see what device tree says about the FEC codes */ + if (xsdfec->config.code == XSDFEC_LDPC_CODE) { + dev_err(xsdfec->dev, + "%s: Unable to write Turbo to SDFEC%d check DT", + __func__, xsdfec->config.fec_id); + return -EIO; + } + + turbo_write = ((turbo.scale & XSDFEC_TURBO_SCALE_MASK) + << XSDFEC_TURBO_SCALE_BIT_POS) | + turbo.alg; + xsdfec_regwrite(xsdfec, XSDFEC_TURBO_ADDR, turbo_write); + return err; +} + +static int xsdfec_get_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + u32 reg_value; + struct xsdfec_turbo turbo_params; + int err; + + if (xsdfec->config.code == XSDFEC_LDPC_CODE) { + dev_err(xsdfec->dev, + "%s: SDFEC%d is configured for LDPC, check DT", + __func__, xsdfec->config.fec_id); + return -EIO; + } + + reg_value = xsdfec_regread(xsdfec, XSDFEC_TURBO_ADDR); + + turbo_params.scale = (reg_value & XSDFEC_TURBO_SCALE_MASK) >> + XSDFEC_TURBO_SCALE_BIT_POS; + turbo_params.alg = reg_value & 0x1; + + err = copy_to_user(arg, &turbo_params, sizeof(turbo_params)); + if (err) + err = -EFAULT; + + return err; +} + static u32 xsdfec_translate_axis_width_cfg_val(enum xsdfec_axis_width axis_width_cfg) { @@ -340,6 +411,12 @@ static long xsdfec_dev_ioctl(struct file *fptr, unsigned int cmd, } switch (cmd) { + case XSDFEC_SET_TURBO: + rval = xsdfec_set_turbo(xsdfec, arg); + break; + case XSDFEC_GET_TURBO: + rval = xsdfec_get_turbo(xsdfec, arg); + break; default: /* Should not get here */ dev_err(xsdfec->dev, "Undefined SDFEC IOCTL"); diff --git a/include/uapi/misc/xilinx_sdfec.h b/include/uapi/misc/xilinx_sdfec.h index 68eeb94..3dc8c53 100644 --- a/include/uapi/misc/xilinx_sdfec.h +++ b/include/uapi/misc/xilinx_sdfec.h @@ -39,6 +39,22 @@ enum xsdfec_order { }; /** + * enum xsdfec_turbo_alg - Turbo Algorithm Type. + * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When + * scaling is set to this is equivalent to the Max Log-Map + * algorithm. + * @XSDFEC_MAX_STAR: Log-Map algorithm. + * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms. + * + * This enum specifies which Turbo Decode algorithm is in use. + */ +enum xsdfec_turbo_alg { + XSDFEC_MAX_SCALE = 0, + XSDFEC_MAX_STAR, + XSDFEC_TURBO_ALG_MAX, +}; + +/** * enum xsdfec_state - State. * @XSDFEC_INIT: Driver is initialized. * @XSDFEC_STARTED: Driver is started. @@ -96,6 +112,33 @@ enum xsdfec_axis_word_include { }; /** + * struct xsdfec_turbo - User data for Turbo codes. + * @alg: Specifies which Turbo decode algorithm to use + * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm + * has been selected + * + * Turbo code structure to communicate parameters to XSDFEC driver. + */ +struct xsdfec_turbo { + enum xsdfec_turbo_alg alg; + __u8 scale; +}; + +/** + * struct xsdfec_status - Status of SD-FEC core. + * @fec_id: ID of SD-FEC instance. ID is limited to the number of active + * SD-FEC's in the FPGA and is related to the driver instance + * Minor number. + * @state: State of the SD-FEC core + * @activity: Describes if the SD-FEC instance is Active + */ +struct xsdfec_status { + __s32 fec_id; + enum xsdfec_state state; + __s8 activity; +}; + +/** * struct xsdfec_irq - Enabling or Disabling Interrupts. * @enable_isr: If true enables the ISR * @enable_ecc_isr: If true enables the ECC ISR @@ -137,4 +180,32 @@ struct xsdfec_config { * XSDFEC IOCTL List */ #define XSDFEC_MAGIC 'f' +/** + * DOC: XSDFEC_SET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the Turbo decode + * settings for the SD-FEC core + * + * @Description + * + * ioctl that sets the SD-FEC Turbo parameter values + * + * This can only be used when the driver is in the XSDFEC_STOPPED state + */ +#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo) +/** + * DOC: XSDFEC_GET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the current Turbo + * decode settings of the SD-FEC Block + * + * @Description + * + * ioctl that returns SD-FEC turbo param values + */ +#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo) #endif /* __XILINX_SDFEC_H__ */ -- 2.7.4