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From: davej@suse.de
Date: Tue, 7 Nov 2000 23:24:54 +0000 (GMT)
To: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
cc: jmerkey@timpanogas.org
Subject: Re: Installing kernel 2.4
Message-ID: <Pine.LNX.4.21.0011072322120.8187-100000@neo.local>
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> There are tests for all this in the feature flags for intel and
> non-intel CPUs like AMD -- including MTRR settings.  All of this could
> be dynamic.  Here's some code that does this, and it's similiar to
> NetWare.  It detexts CPU type, feature flags, special instructions,
> etc.  All of this on x86 could be dynamically detected.

Detecting the CPU isn't the issue (we already do all this), it's what to
do when you've figured out what the CPU is. Show me code that can
dynamically adjust the alignment of the routines/variables/structs
dependant upon cacheline size.

regards,

Davej.

-- 
| Dave Jones <davej@suse.de>  http://www.suse.de/~davej
| SuSE Labs

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