Date: Wed, 9 Feb 2005 12:31:40 +0100
From: Ingo Molnar <mingo@elte.hu>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Daniel Walker <dwalker@mvista.com>, LKML <linux-kernel@vger.kernel.org>,
       Sven Dietrich <sdietrich@mvista.com>,
       Russell King - ARM Linux <linux@arm.linux.org.uk>
Subject: Re: Preempt Real-time for ARM
Message-ID: <20050209113140.GB13274@elte.hu>
References: <1107628604.5065.54.camel@dhcp153.mvista.com> <1107948492.17747.31.camel@tglx.tec.linutronix.de>
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* Thomas Gleixner <tglx@linutronix.de> wrote:

> On Sat, 2005-02-05 at 10:36 -0800, Daniel Walker wrote:
> 
> > The biggest point of discussion relates to the interrupts in threads
> > implementation. It is largely identical to what is implemented in the
> > generic irq handling. However, ARM doesn't not implement generic irq
> > handling, and will not support it in the near future. I am not in
> > support of two different threaded interrupt implementations. 
> 
> We have done the conversion to the generic irq handling and it works
> fine on a couple of machines. 

great - this would be a much preferred approach indeed.

> I'm just waiting until the new SMP bits are there before I have
> another go and clean up the missing SMP bits.

any chances for (most of) these bits going upstream as well? In any
case, the -RT tree can be a testbed for this.

	Ingo
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