Subject: Re: [discuss] Re: [PATCH] x86-64: Fix bad assumption that dualcore
	cpus have synced TSCs
From: john stultz <johnstul@us.ibm.com>
To: Scott Lampert <scott@lampert.org>
Cc: "Langsdorf, Mark" <mark.langsdorf@amd.com>, Andi Kleen <ak@suse.de>,
       Andrew Morton <akpm@osdl.org>, lkml <linux-kernel@vger.kernel.org>,
       discuss@x86-64.org
In-Reply-To: <433061E4.20903@lampert.org>
References: <84EA05E2CA77634C82730353CBE3A843032187C4@SAUSEXMB1.amd.com>
	 <433061E4.20903@lampert.org>
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Date: Tue, 20 Sep 2005 12:30:56 -0700
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On Tue, 2005-09-20 at 12:24 -0700, Scott Lampert wrote:
> Langsdorf, Mark wrote:
> >>Personally I suspect that the powernow driver is putting the 
> >>cores independently into low power sleep and the TSCs are 
> >>being independently halted, causing them to become unsynchronized.
> >
> >The powernow-k8 driver doesn't know what a low power sleep state
> >is, so I strongly doubt it is involved here.  It only handles
> >pstates.
> > 
> Just to add some end-user input here, I see the same issues regardless 
> of whether I'm running with the powernow-k8 or not.  The clock problems 
> seem to be unrelated to that, at least on my system.

Hmmm. Ok, I don't know the cpufreq/power management code well enough. 

I know some Intel cpus halt the TSC in C3. Could the ACPI code be
causing this? 

Could anyone with better knowledge speak to why it looks like the TSCs
are unsynced? Is my test flawed?

thanks
-john


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